Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Texas Instruments DaVinci McBSP module
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) This binding describes the "Multi-channel Buffered Serial Port" (McBSP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) audio interface found in some TI DaVinci processors like the OMAP-L138 or AM180x.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) ~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - compatible :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)         "ti,da850-mcbsp" : for DA850, AM180x and OPAM-L138 platforms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - reg : physical base address and length of the controller memory mapped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)         region(s).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - reg-names : Should contain:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)         * "mpu" for the main registers (required).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)         * "dat" for the data FIFO (optional).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - dmas: three element list of DMA controller phandles, DMA request line and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	TC channel ordered triplets.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - dma-names: identifier string for each DMA request line in the dmas property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	These strings correspond 1:1 with the ordered pairs in dmas. The dma
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	identifiers must be "rx" and "tx".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) ~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - interrupts : Interrupt numbers for McBSP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) - interrupt-names : Known interrupt names are "rx" and "tx"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) - pinctrl-0: Should specify pin control group used for this controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) - pinctrl-names: Should contain only one value - "default", for more details
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)         please refer to pinctrl-bindings.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) Example (AM1808):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) ~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) mcbsp0: mcbsp@1d10000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	compatible = "ti,da850-mcbsp";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	pinctrl-names = "default";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	pinctrl-0 = <&mcbsp0_pins>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	reg = 	<0x00110000 0x1000>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 		<0x00310000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	reg-names = "mpu", "dat";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	interrupts = <97 98>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	interrupt-names = "rx", "tx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	dmas = <&edma0 3 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 		&edma0 2 1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	dma-names = "tx", "rx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) };