Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Texas Instruments McASP controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - compatible :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 	"ti,dm646x-mcasp-audio"	: for DM646x platforms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 	"ti,da830-mcasp-audio"	: for both DA830 & DA850 platforms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 	"ti,am33xx-mcasp-audio"	: for AM33xx platforms (AM33xx, AM43xx, TI81xx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 	"ti,dra7-mcasp-audio"	: for DRA7xx platforms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - reg : Should contain reg specifiers for the entries in the reg-names property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - reg-names : Should contain:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)          * "mpu" for the main registers (required). For compatibility with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)            existing software, it is recommended this is the first entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)          * "dat" for separate data port register access (optional).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - op-mode : I2S/DIT ops mode. 0 for I2S mode. 1 for DIT mode used for S/PDIF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)   	    IEC60958-1, and AES-3 formats.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - tdm-slots : Slots for TDM operation. Indicates number of channels transmitted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)   	      or received over one serializer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - serial-dir : A list of serializer configuration. Each entry is a number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)                indication for serializer pin direction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)                (0 - INACTIVE, 1 - TX, 2 - RX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - dmas: two element list of DMA controller phandles and DMA request line
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)         ordered pairs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - dma-names: identifier string for each DMA request line in the dmas property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	     These strings correspond 1:1 with the ordered pairs in dmas. The dma
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	     identifiers must be "rx" and "tx".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) - ti,hwmods : Must be "mcasp<n>", n is controller instance starting 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) - tx-num-evt : FIFO levels.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) - rx-num-evt : FIFO levels.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) - dismod : Specify the drive on TX pin during inactive slots
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	0 : 3-state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	2 : logic low
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	3 : logic high
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	Defaults to 'logic low' when the property is not present
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) - sram-size-playback : size of sram to be allocated during playback
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) - sram-size-capture  : size of sram to be allocated during capture
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) - interrupts : Interrupt numbers for McASP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) - interrupt-names : Known interrupt names are "tx" and "rx"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) - pinctrl-0: Should specify pin control group used for this controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) - pinctrl-names: Should contain only one value - "default", for more details
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)   		 please refer to pinctrl-bindings.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) - fck_parent : Should contain a valid clock name which will be used as parent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	       for the McASP fck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) - auxclk-fs-ratio: When McASP is bus master indicates the ratio between AUCLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 		   and FS rate if applicable:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 		   AUCLK rate = auxclk-fs-ratio * FS rate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) Optional GPIO support:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) If any McASP pin need to be used as GPIO then the McASP node must have:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)   gpio-controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)   #gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) When requesting a GPIO, the first parameter is the PIN index in McASP_P*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) For example to request the AXR2 pin of mcasp8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) function-gpios = <&mcasp8 2 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) Or to request the ACLKR pin of mcasp8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) function-gpios = <&mcasp8 29 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) For generic gpio information, please refer to bindings/gpio/gpio.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) mcasp0: mcasp0@1d00000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 	compatible = "ti,da830-mcasp-audio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 	reg = <0x100000 0x3000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 	reg-names "mpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	interrupts = <82>, <83>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 	interrupt-names = "tx", "rx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 	op-mode = <0>;		/* MCASP_IIS_MODE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 	tdm-slots = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 	serial-dir = <
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 			0 0 0 0	/* 0: INACTIVE, 1: TX, 2: RX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 			0 0 0 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 			0 0 0 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) 			2 0 0 0 >;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) 	tx-num-evt = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 	rx-num-evt = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) };