^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Dialog Semiconductor DA7219 Audio Codec bindings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) DA7219 is an audio codec with advanced accessory detect features.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) ======
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) - compatible : Should be "dlg,da7219"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - reg: Specifies the I2C slave address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - interrupts : IRQ line info for DA7219.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) further information relating to interrupt properties)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - VDD-supply: VDD power supply for the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - VDDMIC-supply: VDDMIC power supply for the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - VDDIO-supply: VDDIO power supply for the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) (See Documentation/devicetree/bindings/regulator/regulator.txt for further
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) information relating to regulators)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - interrupt-names : Name associated with interrupt line. Should be "wakeup" if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) interrupt is to be used to wake system, otherwise "irq" should be used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - wakeup-source: Flag to indicate this device can wake system (suspend/resume).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) - #clock-cells : Should be set to '<1>', two clock sources provided;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - clock-output-names : Names given for DAI clock outputs (WCLK & BCLK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) - clocks : phandle and clock specifier for codec MCLK.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) - clock-names : Clock name string for 'clocks' attribute, should be "mclk".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) - dlg,micbias-lvl : Voltage (mV) for Mic Bias
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) [<1600>, <1800>, <2000>, <2200>, <2400>, <2600>]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) - dlg,mic-amp-in-sel : Mic input source type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) ["diff", "se_p", "se_n"]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) Deprecated properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) - dlg,ldo-lvl : Required internal LDO voltage (mV) level for digital engine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) (LDO unavailable in production HW so property no longer required).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) ======
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) Child node - 'da7219_aad':
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) - dlg,micbias-pulse-lvl : Mic bias higher voltage pulse level (mV).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) [<2800>, <2900>]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) - dlg,micbias-pulse-time : Mic bias higher voltage pulse duration (ms)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) - dlg,btn-cfg : Periodic button press measurements for 4-pole jack (ms)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) [<2>, <5>, <10>, <50>, <100>, <200>, <500>]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) - dlg,mic-det-thr : Impedance threshold for mic detection measurement (Ohms)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) [<200>, <500>, <750>, <1000>]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) - dlg,jack-ins-deb : Debounce time for jack insertion (ms)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) [<5>, <10>, <20>, <50>, <100>, <200>, <500>, <1000>]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) - dlg,jack-det-rate: Jack type detection latency (3/4 pole)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) ["32ms_64ms", "64ms_128ms", "128ms_256ms", "256ms_512ms"]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) - dlg,jack-rem-deb : Debounce time for jack removal (ms)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) [<1>, <5>, <10>, <20>]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) - dlg,a-d-btn-thr : Impedance threshold between buttons A and D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) [0x0 - 0xFF]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) - dlg,d-b-btn-thr : Impedance threshold between buttons D and B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) [0x0 - 0xFF]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) - dlg,b-c-btn-thr : Impedance threshold between buttons B and C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) [0x0 - 0xFF]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) - dlg,c-mic-btn-thr : Impedance threshold between button C and Mic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) [0x0 - 0xFF]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) - dlg,btn-avg : Number of 8-bit readings for averaged button measurement
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) [<1>, <2>, <4>, <8>]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) - dlg,adc-1bit-rpt : Repeat count for 1-bit button measurement
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) [<1>, <2>, <4>, <8>]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) ======
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) codec: da7219@1a {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) compatible = "dlg,da7219";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) reg = <0x1a>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) interrupt-parent = <&gpio6>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) VDD-supply = <®_audio>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) VDDMIC-supply = <®_audio>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) VDDIO-supply = <®_audio>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #clock-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) clock-output-names = "dai-wclk", "dai-bclk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) clocks = <&clks 201>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) clock-names = "mclk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) dlg,ldo-lvl = <1200>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) dlg,micbias-lvl = <2600>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) dlg,mic-amp-in-sel = "diff";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) da7219_aad {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) dlg,btn-cfg = <50>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) dlg,mic-det-thr = <500>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) dlg,jack-ins-deb = <20>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) dlg,jack-det-rate = "32ms_64ms";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) dlg,jack-rem-deb = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) dlg,a-d-btn-thr = <0xa>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) dlg,d-b-btn-thr = <0x16>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) dlg,b-c-btn-thr = <0x21>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) dlg,c-mic-btn-thr = <0x3E>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) dlg,btn-avg = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) dlg,adc-1bit-rpt = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };