Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) Dialog Semiconductor DA7218 Audio Codec bindings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) DA7218 is an audio codec with HP detect feature.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) ======
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) - compatible : Should be "dlg,da7217" or "dlg,da7218"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) - reg: Specifies the I2C slave address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) - VDD-supply: VDD power supply for the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) - VDDMIC-supply: VDDMIC power supply for the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) - VDDIO-supply: VDDIO power supply for the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)   (See Documentation/devicetree/bindings/regulator/regulator.txt for further
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)    information relating to regulators)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) - interrupts: IRQ line info for DA7218 chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)   (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)    further information relating to interrupt properties)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) - interrupt-names : Name associated with interrupt line. Should be "wakeup" if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)   interrupt is to be used to wake system, otherwise "irq" should be used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) - wakeup-source: Flag to indicate this device can wake system (suspend/resume).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) - clocks : phandle and clock specifier for codec MCLK.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) - clock-names : Clock name string for 'clocks' attribute, should be "mclk".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) - dlg,micbias1-lvl-millivolt : Voltage (mV) for Mic Bias 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	[<1200>, <1600>, <1800>, <2000>, <2200>, <2400>, <2600>, <2800>, <3000>]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) - dlg,micbias2-lvl-millivolt : Voltage (mV) for Mic Bias 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	[<1200>, <1600>, <1800>, <2000>, <2200>, <2400>, <2600>, <2800>, <3000>]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) - dlg,mic1-amp-in-sel : Mic1 input source type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	["diff", "se_p", "se_n"]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) - dlg,mic2-amp-in-sel : Mic2 input source type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	["diff", "se_p", "se_n"]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) - dlg,dmic1-data-sel : DMIC1 channel select based on clock edge.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	["lrise_rfall", "lfall_rrise"]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) - dlg,dmic1-samplephase : When to sample audio from DMIC1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	["on_clkedge", "between_clkedge"]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) - dlg,dmic1-clkrate-hz : DMic1 clock frequency (Hz).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	[<1500000>, <3000000>]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) - dlg,dmic2-data-sel : DMic2 channel select based on clock edge.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	["lrise_rfall", "lfall_rrise"]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) - dlg,dmic2-samplephase : When to sample audio from DMic2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	["on_clkedge", "between_clkedge"]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) - dlg,dmic2-clkrate-hz : DMic2 clock frequency (Hz).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	[<1500000>, <3000000>]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) - dlg,hp-diff-single-supply : Boolean flag, use single supply for HP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 			      (DA7217 only)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) ======
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) Optional Child node - 'da7218_hpldet' (DA7218 only):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) - dlg,jack-rate-us : Time between jack detect measurements (us)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	[<5>, <10>, <20>, <40>, <80>, <160>, <320>, <640>]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) - dlg,jack-debounce : Number of debounce measurements taken for jack detect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	[<0>, <2>, <3>, <4>]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) - dlg,jack-threshold-pct : Threshold level for jack detection (% of VDD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	[<84>, <88>, <92>, <96>]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) - dlg,comp-inv : Boolean flag, invert comparator output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) - dlg,hyst : Boolean flag, enable hysteresis
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) - dlg,discharge : Boolean flag, auto discharge of Mic Bias on jack removal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) ======
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	codec: da7218@1a {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		compatible = "dlg,da7218";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 		reg = <0x1a>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		interrupt-parent = <&gpio6>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		wakeup-source;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		VDD-supply = <&reg_audio>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		VDDMIC-supply = <&reg_audio>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		VDDIO-supply = <&reg_audio>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		clocks = <&clks 201>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		clock-names = "mclk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		dlg,micbias1-lvl-millivolt = <2600>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		dlg,micbias2-lvl-millivolt = <2600>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		dlg,mic1-amp-in-sel = "diff";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		dlg,mic2-amp-in-sel = "diff";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		dlg,dmic1-data-sel = "lrise_rfall";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		dlg,dmic1-samplephase = "on_clkedge";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		dlg,dmic1-clkrate-hz = <3000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		dlg,dmic2-data-sel = "lrise_rfall";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		dlg,dmic2-samplephase = "on_clkedge";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		dlg,dmic2-clkrate-hz = <3000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		da7218_hpldet {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 			dlg,jack-rate-us = <40>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 			dlg,jack-debounce = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 			dlg,jack-threshold-pct = <84>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 			dlg,hyst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	};