^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) CS42L73 audio CODEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - compatible : "cirrus,cs42l73"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - reg : the I2C address of the device for I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - reset_gpio : a GPIO spec for the reset pin.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - chgfreq : Charge Pump Frequency values 0x00-0x0F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) codec: cs42l73@4a {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) compatible = "cirrus,cs42l73";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) reg = <0x4a>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) reset_gpio = <&gpio 10 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) chgfreq = <0x05>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) };