Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) # Copyright 2019 Unisoc Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) $id: "http://devicetree.org/schemas/serial/sprd-uart.yaml#"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) $schema: "http://devicetree.org/meta-schemas/core.yaml#"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) title: Spreadtrum serial UART
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)   - Orson Zhai <orsonzhai@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)   - Baolin Wang <baolin.wang7@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)   - Chunyan Zhang <zhang.lyra@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)   compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)     oneOf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)       - items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)           - enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)               - sprd,sc9860-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)               - sprd,sc9863a-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)           - const: sprd,sc9836-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)       - const: sprd,sc9836-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)   reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)   interrupts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)   clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)     minItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)     maxItems: 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)   clock-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)     description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)       "enable" for UART module enable clock, "uart" for UART clock, "source" 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)       for UART source (parent) clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)     items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)       - const: enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)       - const: uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)       - const: source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)   dmas:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)     minItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)     maxItems: 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)   dma-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)     minItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)     items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)       - const: rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)       - const: tx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)   - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)   - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)   - interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) additionalProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)   - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)     #include <dt-bindings/interrupt-controller/arm-gic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)     serial@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)       compatible = "sprd,sc9860-uart", "sprd,sc9836-uart";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)       reg = <0x0 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)       interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)       dma-names = "rx", "tx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)       dmas = <&ap_dma 19>, <&ap_dma 20>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)       clock-names = "enable", "uart", "source";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)       clocks = <&clk_ap_apb_gates 9>, <&clk_uart0>, <&ext_26m>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)     };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) ...