^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) title: Synopsys DesignWare ABP UART
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - Rob Herring <robh@kernel.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) allOf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - $ref: /schemas/serial.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) oneOf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - renesas,r9a06g032-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - renesas,r9a06g033-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - const: renesas,rzn1-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) - rockchip,px30-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) - rockchip,rk3036-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - rockchip,rk3066-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) - rockchip,rk3188-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) - rockchip,rk3288-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) - rockchip,rk3308-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) - rockchip,rk3328-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) - rockchip,rk3368-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) - rockchip,rk3399-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) - rockchip,rv1108-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) - const: snps,dw-apb-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) - items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) - enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) - brcm,bcm11351-dw-apb-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) - brcm,bcm21664-dw-apb-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) - const: snps,dw-apb-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) - const: snps,dw-apb-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) interrupts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) clock-frequency: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) minItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) maxItems: 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) clock-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) - const: baudclk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) - const: apb_pclk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) snps,uart-16550-compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) description: reflects the value of UART_16550_COMPATIBLE configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) parameter. Define this if your UART does not implement the busy functionality.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) type: boolean
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) resets:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) reg-shift: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) reg-io-width: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) dcd-override:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) description: Override the DCD modem status signal. This signal will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) always be reported as active instead of being obtained from the modem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) status register. Define this if your serial port does not use this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) pin.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) type: boolean
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) dsr-override:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) description: Override the DTS modem status signal. This signal will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) always be reported as active instead of being obtained from the modem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) status register. Define this if your serial port does not use this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) pin.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) type: boolean
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) cts-override:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) description: Override the CTS modem status signal. This signal will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) always be reported as active instead of being obtained from the modem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) status register. Define this if your serial port does not use this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) pin.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) type: boolean
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) ri-override:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) description: Override the RI modem status signal. This signal will always
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) be reported as inactive instead of being obtained from the modem status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) register. Define this if your serial port does not use this pin.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) type: boolean
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) - interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) unevaluatedProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) serial@80230000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) compatible = "snps,dw-apb-uart";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) reg = <0x80230000 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) clock-frequency = <3686400>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) interrupts = <10>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) reg-shift = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) reg-io-width = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) dcd-override;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) dsr-override;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) cts-override;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) ri-override;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) // Example with one clock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) serial@80230000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) compatible = "snps,dw-apb-uart";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) reg = <0x80230000 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) clocks = <&baudclk>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) interrupts = <10>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) reg-shift = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) reg-io-width = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) // Example with two clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) serial@80230000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) compatible = "snps,dw-apb-uart";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) reg = <0x80230000 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) clocks = <&baudclk>, <&apb_pclk>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) clock-names = "baudclk", "apb_pclk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) interrupts = <10>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) reg-shift = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) reg-io-width = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) ...
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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