Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) $id: http://devicetree.org/schemas/serial/pl011.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) title: ARM AMBA Primecell PL011 serial UART
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)   - Rob Herring <robh@kernel.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) allOf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)   - $ref: /schemas/serial.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) # Need a custom select here or 'arm,primecell' will match on lots of nodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) select:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)   properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)     compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)       contains:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)         enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)           - arm,pl011
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)           - zte,zx296702-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)   required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)     - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)   compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)     oneOf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)       - items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)           - const: arm,pl011
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)           - const: arm,primecell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)       - items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)           - const: zte,zx296702-uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)           - const: arm,primecell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)   reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)   interrupts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)   pinctrl-0: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)   pinctrl-1: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)   pinctrl-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47)       When present, must have one state named "default",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)       and may contain a second name named "sleep". The former
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)       state sets up pins for ordinary operation whereas
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)       the latter state will put the associated pins to sleep
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51)       when the UART is unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52)     minItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)     items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54)       - const: default
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55)       - const: sleep
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)   clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59)       When present, the first clock listed must correspond to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60)       the clock named UARTCLK on the IP block, i.e. the clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61)       to the external serial line, whereas the second clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62)       must correspond to the PCLK clocking the internal logic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63)       of the block. Just listing one clock (the first one) is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64)       deprecated.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65)     maxItems: 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67)   clock-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68)     items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69)       - const: uartclk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70)       - const: apb_pclk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72)   dmas:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73)     minItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74)     maxItems: 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76)   dma-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77)     minItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78)     items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79)       - const: rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80)       - const: tx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82)   auto-poll:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84)       Enables polling when using RX DMA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85)     type: boolean
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87)   poll-rate-ms:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89)       Rate at which poll occurs when auto-poll is set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90)       default 100ms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91)     $ref: /schemas/types.yaml#/definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92)     default: 100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94)   poll-timeout-ms:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96)       Poll timeout when auto-poll is set, default
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97)       3000ms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98)     $ref: /schemas/types.yaml#/definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99)     default: 3000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)   - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)   - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)   - interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) dependencies:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)   poll-rate-ms: [ auto-poll ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)   poll-timeout-ms: [ auto-poll ]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) additionalProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)   - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)     serial@80120000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)       compatible = "arm,pl011", "arm,primecell";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)       reg = <0x80120000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)       interrupts = <0 11 4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)       dmas = <&dma 13 0 0x2>, <&dma 13 0 0x0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)       dma-names = "rx", "tx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)       clocks = <&foo_clk>, <&bar_clk>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)       clock-names = "uartclk", "apb_pclk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)     };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) ...