^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) * NXP LPC32xx SoC High Speed UART
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) - compatible: Should be "nxp,lpc3220-hsuart"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - reg: Should contain registers location and length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) - interrupts: Should contain interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) uart1: serial@40014000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) compatible = "nxp,lpc3220-hsuart";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) reg = <0x40014000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) interrupts = <26 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) };