Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * Marvell UART : Non standard UART used in some of Marvell EBU SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)                  e.g., Armada-3700.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) - compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)     - "marvell,armada-3700-uart" for the standard variant of the UART
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)       (32 bytes FIFO, no DMA, level interrupts, 8-bit access to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)       FIFO, baudrate limited to 230400).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)     - "marvell,armada-3700-uart-ext" for the extended variant of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)       UART (128 bytes FIFO, DMA, front interrupts, 8-bit or 32-bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)       accesses to the FIFO, baudrate unlimited by the dividers).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - reg: offset and length of the register set for the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - clocks: UART reference clock used to derive the baudrate. If no clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)       is provided (possible only with the "marvell,armada-3700-uart"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)       compatible string for backward compatibility), it will only work
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)       if the baudrate was initialized by the bootloader and no baudrate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)       change will then be possible.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - interrupts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)     - Must contain three elements for the standard variant of the IP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)       (marvell,armada-3700-uart): "uart-sum", "uart-tx" and "uart-rx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)       respectively the UART sum interrupt, the UART TX interrupt and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)       UART RX interrupt. A corresponding interrupt-names property must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)       be defined.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)     - Must contain two elements for the extended variant of the IP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)       (marvell,armada-3700-uart-ext): "uart-tx" and "uart-rx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)       respectively the UART TX interrupt and the UART RX interrupt. A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)       corresponding interrupt-names property must be defined.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)     - For backward compatibility reasons, a single element interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)       property is also supported for the standard variant of the IP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)       containing only the UART sum interrupt. This form is deprecated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)       and should no longer be used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	uart0: serial@12000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		compatible = "marvell,armada-3700-uart";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 		reg = <0x12000 0x200>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		clocks = <&xtalclk>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		interrupts =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 		interrupt-names = "uart-sum", "uart-tx", "uart-rx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	uart1: serial@12200 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 		compatible = "marvell,armada-3700-uart-ext";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 		reg = <0x12200 0x30>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 		clocks = <&xtalclk>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 		interrupts =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 		<GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 		<GIC_SPI 31 IRQ_TYPE_EDGE_RISING>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 		interrupt-names = "uart-tx", "uart-rx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	};