Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) $id: http://devicetree.org/schemas/serial/fsl-lpuart.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) title: Freescale low power universal asynchronous receiver/transmitter (lpuart)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)   - Fugang Duan <fugang.duan@nxp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) allOf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)   - $ref: "rs485.yaml"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)   compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)     oneOf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)       - enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)           - fsl,vf610-lpuart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)           - fsl,ls1021a-lpuart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)           - fsl,ls1028a-lpuart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)           - fsl,imx7ulp-lpuart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)           - fsl,imx8qm-lpuart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)       - items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)           - const: fsl,imx8qxp-lpuart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)           - const: fsl,imx7ulp-lpuart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)   reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)   interrupts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)   clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)     items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)       - description: ipg clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)       - description: baud clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)     minItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)     maxItems: 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)   clock-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)     items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)       - const: ipg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)       - const: baud
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)     minItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)     maxItems: 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)   dmas:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)     items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)       - description: DMA controller phandle and request line for RX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)       - description: DMA controller phandle and request line for TX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)   dma-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)     items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)       - const: rx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)       - const: tx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)   rs485-rts-active-low: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)   linux,rs485-enabled-at-boot-time: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)   - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)   - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)   - interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)   - clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)   - clock-names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) unevaluatedProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)   - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)     #include <dt-bindings/clock/vf610-clock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)     serial@40027000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)         compatible = "fsl,vf610-lpuart";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)         reg = <0x40027000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)         interrupts = <0 61 0x00>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)         clocks = <&clks VF610_CLK_UART0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)         clock-names = "ipg";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)         dmas = <&edma0 0 2>, <&edma0 0 3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)         dma-names = "rx","tx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)     };