Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * Universal Asynchronous Receiver/Transmitter (UART)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) - compatible: "cavium,octeon-3860-uart"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)   Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - reg: The base address of the UART register bank.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - interrupts: A single interrupt specifier.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - current-speed: Optional, the current bit rate in bits per second.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	uart1: serial@1180000000c00 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 		compatible = "cavium,octeon-3860-uart","ns16550";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 		reg = <0x11800 0x00000c00 0x0 0x400>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 		current-speed = <115200>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 		interrupts = <0 35>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	};