Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Device-Tree bindings for MediaTek SoC based RTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - compatible	    : Should be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 			"mediatek,mt7622-rtc", "mediatek,soc-rtc" : for MT7622 SoC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) - reg 		    : Specifies base physical address and size of the registers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - interrupts	    : Should contain the interrupt for RTC alarm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) - clocks	    : Specifies list of clock specifiers, corresponding to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 		      entries in clock-names property;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - clock-names	    : Should contain "rtc" entries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) rtc: rtc@10212800 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	compatible = "mediatek,mt7622-rtc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 		     "mediatek,soc-rtc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	reg = <0 0x10212800 0 0x200>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_LOW>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	clocks = <&topckgen CLK_TOP_RTC>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	clock-names = "rtc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) };