Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * Maxim/Dallas Semiconductor DS-1302 RTC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Simple device which could be used to store date/time between reboots.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) The device uses the standard MicroWire half-duplex transfer timing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) Master output is set on low clock and sensed by the RTC on the rising
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) edge. Master input is set by the RTC on the trailing edge and is sensed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) by the master on low clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - compatible : Should be "maxim,ds1302"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) Required SPI properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - reg : Should be address of the device chip select within
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)   the controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - spi-max-frequency : DS-1302 has 500 kHz if powered at 2.2V,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)   and 2MHz if powered at 5V.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - spi-3wire : The device has a shared signal IN/OUT line.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - spi-lsb-first : DS-1302 requires least significant bit first
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)   transfers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - spi-cs-high: DS-1302 has active high chip select line. This is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)   required unless inverted in hardware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) spi@901c {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	#address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	#size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	compatible = "icpdas,lp8841-spi-rtc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	reg = <0x901c 0x1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	rtc@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		compatible = "maxim,ds1302";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		reg = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		spi-max-frequency = <500000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 		spi-3wire;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 		spi-lsb-first;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 		spi-cs-high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };