^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) = Reset Signal Device Tree Bindings =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) This binding is intended to represent the hardware reset signals present
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) internally in most IC (SoC, FPGA, ...) designs. Reset signals for whole
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) standalone chips are most likely better represented as GPIOs, although there
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) are likely to be exceptions to this rule.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Hardware blocks typically receive a reset signal. This signal is generated by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) a reset provider (e.g. power management or clock module) and received by a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) reset consumer (the module being reset, or a module managing when a sub-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) ordinate module is reset). This binding exists to represent the provider and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) consumer, and provide a way to couple the two together.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) A reset signal is represented by the phandle of the provider, plus a reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) specifier - a list of DT cells that represents the reset signal within the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) provider. The length (number of cells) and semantics of the reset specifier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) are dictated by the binding of the reset provider, although common schemes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) are described below.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) A word on where to place reset signal consumers in device tree: It is possible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) in hardware for a reset signal to affect multiple logically separate HW blocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) at once. In this case, it would be unwise to represent this reset signal in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) the DT node of each affected HW block, since if activated, an unrelated block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) may be reset. Instead, reset signals should be represented in the DT node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) where it makes most sense to control it; this may be a bus node if all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) children of the bus are affected by the reset signal, or an individual HW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) block node for dedicated reset signals. The intent of this binding is to give
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) appropriate software access to the reset signals in order to manage the HW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) rather than to slavishly enumerate the reset signal that affects each HW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) block.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) = Reset providers =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #reset-cells: Number of cells in a reset specifier; Typically 0 for nodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) with a single reset output and 1 for nodes with multiple
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) reset outputs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) For example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) rst: reset-controller {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #reset-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) = Reset consumers =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) resets: List of phandle and reset specifier pairs, one pair
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) for each reset signal that affects the device, or that the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) device manages. Note: if the reset provider specifies '0' for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #reset-cells, then only the phandle portion of the pair will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) appear.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) reset-names: List of reset signal name strings sorted in the same order as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) the resets property. Consumers drivers will use reset-names to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) match reset signal names with reset specifiers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) For example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) device {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) resets = <&rst 20>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) reset-names = "reset";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) This represents a device with a single reset signal named "reset".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) bus {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) resets = <&rst 10> <&rst 11> <&rst 12> <&rst 11>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) reset-names = "i2s1", "i2s2", "dma", "mixer";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) This represents a bus that controls the reset signal of each of four sub-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) ordinate devices. Consider for example a bus that fails to operate unless no
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) child device has reset asserted.