^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Marvell PWM controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) - compatible: should be one or more of:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - "marvell,pxa250-pwm"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) - "marvell,pxa270-pwm"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - "marvell,pxa168-pwm"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) - "marvell,pxa910-pwm"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - reg: Physical base address and length of the registers used by the PWM channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) Note that one device instance must be created for each PWM that is used, so the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) length covers only the register window for one PWM output, not that of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) entire PWM controller. Currently length is 0x10 for all supported devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - #pwm-cells: Should be 1. This cell is used to specify the period in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) nanoseconds.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) Example PWM device node:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) pwm0: pwm@40b00000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) compatible = "marvell,pxa250-pwm";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) reg = <0x40b00000 0x10>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #pwm-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) Example PWM client node:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) backlight {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) compatible = "pwm-backlight";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) pwms = <&pwm0 5000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) }