Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) TI SOC ECAP based APWM controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - compatible: Must be "ti,<soc>-ecap".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)   for am33xx - compatible = "ti,am3352-ecap", "ti,am33xx-ecap";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)   for am4372 - compatible = "ti,am4372-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)   for da850  - compatible = "ti,da850-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)   for dra746 - compatible = "ti,dra746-ecap", "ti,am3352-ecap";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)   for 66ak2g - compatible = "ti,k2g-ecap", "ti,am3352-ecap";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)   for am654  - compatible = "ti,am654-ecap", "ti,am3352-ecap";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - #pwm-cells: should be 3. See pwm.yaml in this directory for a description of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)   the cells format. The PWM channel index ranges from 0 to 4. The only third
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)   cell flag supported by this binding is PWM_POLARITY_INVERTED.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - reg: physical base address and size of the registers map.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - clocks: Handle to the ECAP's functional clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - clock-names: Must be set to "fck".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) ecap0: ecap@48300100 { /* ECAP on am33xx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	compatible = "ti,am3352-ecap", "ti,am33xx-ecap";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	#pwm-cells = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	reg = <0x48300100 0x80>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	clocks = <&l4ls_gclk>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	clock-names = "fck";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) ecap0: ecap@48300100 { /* ECAP on am4372 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	compatible = "ti,am4372-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	#pwm-cells = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	reg = <0x48300100 0x80>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	ti,hwmods = "ecap0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	clocks = <&l4ls_gclk>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	clock-names = "fck";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) ecap0: ecap@1f06000 { /* ECAP on da850 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	compatible = "ti,da850-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	#pwm-cells = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	reg = <0x1f06000 0x80>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) ecap0: ecap@4843e100 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	compatible = "ti,dra746-ecap", "ti,am3352-ecap";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	#pwm-cells = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	reg = <0x4843e100 0x80>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	clocks = <&l4_root_clk_div>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	clock-names = "fck";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) };