^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) STMicroelectronics PWM driver bindings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) --------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Required parameters:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - compatible : "st,pwm"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) - #pwm-cells : Number of cells used to specify a PWM. First cell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) specifies the per-chip index of the PWM to use and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) second cell is the period in nanoseconds - fixed to 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) for STiH41x.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - reg : Physical base address and length of the controller's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - pinctrl-names: Set to "default".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - pinctrl-0: List of phandles pointing to pin configuration nodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) for PWM module.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) For Pinctrl properties, please refer to [1].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - clock-names: Valid entries are "pwm" and/or "capture".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - clocks: phandle of the clock used by the PWM module.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) For Clk properties, please refer to [2].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - interrupts: IRQ for the Capture device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - st,pwm-num-chan: Number of available PWM channels. Default is 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - st,capture-num-chan: Number of available Capture channels. Default is 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) [1] Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) [2] Documentation/devicetree/bindings/clock/clock-bindings.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) pwm1: pwm@fe510000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) compatible = "st,pwm";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) reg = <0xfe510000 0x68>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #pwm-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) pinctrl-names = "default";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) pinctrl-0 = <&pinctrl_pwm1_chan0_default
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) &pinctrl_pwm1_chan1_default
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) &pinctrl_pwm1_chan2_default
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) &pinctrl_pwm1_chan3_default>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) clocks = <&clk_sysin>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) clock-names = "pwm";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) st,pwm-num-chan = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) st,capture-num-chan = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };