Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) # Copyright (C) 2020 SiFive, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) $id: http://devicetree.org/schemas/pwm/pwm-sifive.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) title: SiFive PWM controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)   - Yash Shah <yash.shah@sifive.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)   - Sagar Kadam <sagar.kadam@sifive.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)   - Paul Walmsley <paul.walmsley@sifive.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)   Unlike most other PWM controllers, the SiFive PWM controller currently
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)   only supports one period for all channels in the PWM. All PWMs need to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)   run at the same period. The period also has significant restrictions on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)   the values it can achieve, which the driver rounds to the nearest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)   achievable period. PWM RTL that corresponds to the IP block version
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)   numbers can be found here -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)   https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)   compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)     items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)       - const: sifive,fu540-c000-pwm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)       - const: sifive,pwm0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)       Should be "sifive,<chip>-pwm" and "sifive,pwm<version>". Supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)       compatible strings are "sifive,fu540-c000-pwm" for the SiFive PWM v0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)       as integrated onto the SiFive FU540 chip, and "sifive,pwm0" for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)       SiFive PWM v0 IP block with no chip integration tweaks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)       Please refer to sifive-blocks-ip-versioning.txt for details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)   reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)   clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)   "#pwm-cells":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)     const: 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)   interrupts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)     maxItems: 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)       Each PWM instance in FU540-C000 has 4 comparators. One interrupt per comparator.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)   - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)   - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)   - clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)   - "#pwm-cells"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)   - interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) additionalProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)   - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)     pwm:  pwm@10020000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)       compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)       reg = <0x10020000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)       clocks = <&tlclk>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)       interrupt-parent = <&plic>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)       interrupts = <42>, <43>, <44>, <45>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)       #pwm-cells = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)     };