Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Hisilicon PWM controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) -compatible: should contain one SoC specific compatible string
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  The SoC specific strings supported including:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 	"hisilicon,hi3516cv300-pwm"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 	"hisilicon,hi3519v100-pwm"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 	"hisilicon,hi3559v100-shub-pwm"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 	"hisilicon,hi3559v100-pwm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - reg: physical base address and length of the controller's registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - clocks: phandle and clock specifier of the PWM reference clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - resets: phandle and reset specifier for the PWM controller reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)   the cells format.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	pwm: pwm@12130000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 		compatible = "hisilicon,hi3516cv300-pwm";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 		reg = <0x12130000 0x10000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 		clocks = <&crg_ctrl HI3516CV300_PWM_CLK>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 		resets = <&crg_ctrl 0x38 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 		#pwm-cells = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	};