Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Device-Tree bindings for Atmel's HLCDC (High-end LCD Controller) PWM driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) The Atmel HLCDC PWM is subdevice of the HLCDC MFD device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) See ../mfd/atmel-hlcdc.txt for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  - compatible: value should be one of the following:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)    "atmel,hlcdc-pwm"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  - pinctr-names: the pin control state names. Should contain "default".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  - pinctrl-0: should contain the pinctrl states described by pinctrl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)    default.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  - #pwm-cells: should be set to 3. This PWM chip use the default 3 cells
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)    bindings defined in pwm.yaml in this directory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	hlcdc: hlcdc@f0030000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 		compatible = "atmel,sama5d3-hlcdc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 		reg = <0xf0030000 0x2000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 		clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 		clock-names = "periph_clk","sys_clk", "slow_clk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 		hlcdc_pwm: hlcdc-pwm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 			compatible = "atmel,hlcdc-pwm";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 			pinctrl-names = "default";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 			pinctrl-0 = <&pinctrl_lcd_pwm>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 			#pwm-cells = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	};