^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) ST SPEAr miphy DT details
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) =========================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) ST Microelectronics SPEAr miphy is a phy controller supporting PCIe and SATA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - compatible : should be "st,spear1310-miphy" or "st,spear1340-miphy"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) - reg : offset and length of the PHY register set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - misc: phandle for the syscon node to access misc registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - #phy-cells : from the generic PHY bindings, must be 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - cell[1]: 0 if phy used for SATA, 1 for PCIe.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - phy-id: Instance id of the phy. Only required when there are multiple phys
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) present on a implementation.