Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Rockchip specific extensions to the Analogix Display Port PHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) ------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) - compatible : should be one of the following supported values:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 	 - "rockchip.rk3288-dp-phy"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - clocks: from common clock binding: handle to dp clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 	of memory mapped region.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - clock-names: from common clock binding:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 	Required elements: "24m"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - #phy-cells : from the generic PHY bindings, must be 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) grf: syscon@ff770000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	edp_phy: edp-phy {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 		compatible = "rockchip,rk3288-dp-phy";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 		clocks = <&cru SCLK_EDP_24M>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 		clock-names = "24m";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 		#phy-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) };