^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) * Renesas R-Car generation 2 USB PHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) This file provides information on what the device node for the R-Car generation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) 2 USB PHY contains.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - compatible: "renesas,usb-phy-r8a7742" if the device is a part of R8A7742 SoC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) "renesas,usb-phy-r8a7743" if the device is a part of R8A7743 SoC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) "renesas,usb-phy-r8a7744" if the device is a part of R8A7744 SoC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) "renesas,usb-phy-r8a7745" if the device is a part of R8A7745 SoC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) "renesas,usb-phy-r8a77470" if the device is a part of R8A77470 SoC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) "renesas,usb-phy-r8a7791" if the device is a part of R8A7791 SoC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) "renesas,usb-phy-r8a7794" if the device is a part of R8A7794 SoC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) "renesas,rcar-gen2-usb-phy" for a generic R-Car Gen2 or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) RZ/G1 compatible device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) When compatible with the generic version, nodes must list the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) SoC-specific version corresponding to the platform first
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) followed by the generic version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - reg: offset and length of the register block.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - #address-cells: number of address cells for the USB channel subnodes, must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) be <1>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) - #size-cells: number of size cells for the USB channel subnodes, must be <0>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) - clocks: clock phandle and specifier pair.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - clock-names: string, clock input name, must be "usbhs".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) The USB PHY device tree node should have the subnodes corresponding to the USB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) channels. These subnodes must contain the following properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) - reg: the USB controller selector; see the table below for the values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) - #phy-cells: see phy-bindings.txt in the same directory, must be <1>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) The phandle's argument in the PHY specifier is the USB controller selector for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) the USB channel other than r8a77470 SoC; see the selector meanings below:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) +-----------+---------------+---------------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) |\ Selector | | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) + --------- + 0 | 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) | Channel \| | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) +-----------+---------------+---------------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) | 0 | PCI EHCI/OHCI | HS-USB |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) | 2 | PCI EHCI/OHCI | xHCI |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) +-----------+---------------+---------------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) For r8a77470 SoC;see the selector meaning below:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) +-----------+---------------+---------------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) |\ Selector | | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) + --------- + 0 | 1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) | Channel \| | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) +-----------+---------------+---------------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) | 0 | EHCI/OHCI | HS-USB |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) +-----------+---------------+---------------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) Example (Lager board):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) usb-phy@e6590100 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) compatible = "renesas,usb-phy-r8a7790", "renesas,rcar-gen2-usb-phy";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) reg = <0 0xe6590100 0 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) clocks = <&cpg CPG_MOD 704>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) clock-names = "usbhs";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) resets = <&cpg 704>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) usb0: usb-channel@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) reg = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #phy-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) usb2: usb-channel@2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) reg = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #phy-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) Example (iWave RZ/G1C sbc):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) usbphy0: usb-phy0@e6590100 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) compatible = "renesas,usb-phy-r8a77470",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) "renesas,rcar-gen2-usb-phy";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) reg = <0 0xe6590100 0 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) clocks = <&cpg CPG_MOD 704>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) clock-names = "usbhs";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) resets = <&cpg 704>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) usb0: usb-channel@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) reg = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #phy-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) usbphy1: usb-phy@e6598100 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) compatible = "renesas,usb-phy-r8a77470",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) "renesas,rcar-gen2-usb-phy";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) reg = <0 0xe6598100 0 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) clocks = <&cpg CPG_MOD 706>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) clock-names = "usbhs";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) resets = <&cpg 706>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) usb1: usb-channel@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) reg = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #phy-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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