^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Mediatek/Ralink USB PHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) - compatible: "ralink,rt3352-usbphy"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) "mediatek,mt7620-usbphy"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) "mediatek,mt7628-usbphy"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - reg: required for "mediatek,mt7628-usbphy", unused otherwise
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) - #phy-cells: should be 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - ralink,sysctl: a phandle to a ralink syscon register region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - resets: the two reset controllers for host and device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - reset-names: the names of the 2 reset controllers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) usbphy: phy {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) compatible = "mediatek,mt7628-usbphy";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) reg = <0x10120000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #phy-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) ralink,sysctl = <&sysc>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) resets = <&rstctrl 22 &rstctrl 25>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) reset-names = "host", "device";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) };