Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) $id: http://devicetree.org/schemas/phy/phy-rockchip-inno-usb2.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) title: Rockchip USB2.0 phy with inno IP block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)   - Heiko Stuebner <heiko@sntech.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)   compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)     enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)       - rockchip,px30-usb2phy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)       - rockchip,rk1808-usb2phy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)       - rockchip,rk3128-usb2phy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)       - rockchip,rk3228-usb2phy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)       - rockchip,rk3308-usb2phy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)       - rockchip,rk3328-usb2phy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)       - rockchip,rk3366-usb2phy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)       - rockchip,rk3368-usb2phy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)       - rockchip,rk3399-usb2phy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)       - rockchip,rk3568-usb2phy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)       - rockchip,rk3588-usb2phy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)       - rockchip,rv1106-usb2phy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)       - rockchip,rv1108-usb2phy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)   reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)   clock-output-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)       The usb 480m output clock name.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)   "#clock-cells":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)     const: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)   "#phy-cells":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)     const: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)   clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)   clock-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)     const: phyclk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)   assigned-clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)       Phandle of the usb 480m clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52)   assigned-clock-parents:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54)       Parent of the usb 480m clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55)       Select between usb-phy output 480m and xin24m.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)       Refer to clk/clock-bindings.txt for generic clock consumer properties.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)   extcon:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60)       Phandle to the extcon device providing the cable state for the otg phy.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62)   wakeup-source:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64)       Enable USB irq wakeup when suspend.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65)       Only work when suspend wakeup-config is not work.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67)   rockchip,usbgrf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68)     $ref: /schemas/types.yaml#/definitions/phandle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70)       Phandle to the syscon managing the 'usb general register files'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71)       When set the driver will request its phandle as one companion-grf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72)       for some special SoCs (e.g rv1108).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74)   rockchip,usbctrl-grf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75)     $ref: /schemas/types.yaml#/definitions/phandle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77)       Phandle to the syscon managing the 'usb ctrl general register files'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78)       When set the driver will request its phandle as the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79)       usb controller grf for some SoCs (e.g rk3588).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81)   rockchip,u2phy-tuning:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83)     description: when set, tuning u2phy to improve usb2 SI.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85)   host-port:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86)     type: object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87)     additionalProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89)     properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90)       "#phy-cells":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91)         const: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93)       interrupts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94)         description: host linestate interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96)       interrupt-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97)         const: linestate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99)       phy-supply:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)         description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)           Phandle to a regulator that provides power to VBUS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)           See ./phy-bindings.txt for details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)     required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)       - "#phy-cells"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)       - interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)       - interrupt-names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)   otg-port:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)     type: object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)     additionalProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)     properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)       "#phy-cells":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)         const: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)       interrupts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)         minItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)         maxItems: 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)       interrupt-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)         oneOf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)           - const: linestate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)           - const: otg-mux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)           - items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)               - const: otg-bvalid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)               - const: otg-id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)               - const: linestate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)       phy-supply:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)         description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)           Phandle to a regulator that provides power to VBUS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)           See ./phy-bindings.txt for details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)       vbus-supply:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)         description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)           Phandle to a fixed-regulator that provides power to VBUS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)       rockchip,utmi-bypass-uart:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)         $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)         description: when set, indicates that support usb to bypass uart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)           feature. This property can only be added in debug stage.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)       rockchip,utmi-avalid:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)         $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)         description: when set, the usb2 phy will use avalid status bit to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)           get vbus status. If not, it will use bvalid status bit to get vbus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)           status by default.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)      rockchip,vbus-always-on:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)        $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)        description: when set, indicates that the otg vbus is always powered on.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)      rockchip,low-power-mode:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)        $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)        description: when set, the port will enter low power state when suspend.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)      rockchip,typec-vbus-det:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)        $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)        description: when set, check the vbus status from grf con for Type-C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)          interface. It's used when the vbusdet pin is always pulled up.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)      rockchip,sel-pipe-phystatus:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)        $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)        description: when set, select the pipe phy status from grf for usb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)          controller. It's used when the usb3 phy is disabled, and it needs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)          to combine with the usbctrl-grf.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)     required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)       - "#phy-cells"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)       - interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)       - interrupt-names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)   - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)   - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)   - clock-output-names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)   - "#clock-cells"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)   - "#phy-cells"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)   - host-port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)   - otg-port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) additionalProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)   - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)     #include <dt-bindings/clock/rk3399-cru.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)     #include <dt-bindings/interrupt-controller/arm-gic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)     #include <dt-bindings/interrupt-controller/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)     u2phy0: usb2-phy@e450 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)       compatible = "rockchip,rk3399-usb2phy";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)       reg = <0xe450 0x10>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)       clocks = <&cru SCLK_USB2PHY0_REF>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)       clock-names = "phyclk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)       clock-output-names = "clk_usbphy0_480m";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)       #clock-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)       #phy-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)       u2phy0_host: host-port {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)         #phy-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)         interrupt-names = "linestate";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)       };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)       u2phy0_otg: otg-port {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)         #phy-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)         interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)                      <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)                      <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)         interrupt-names = "otg-bvalid", "otg-id", "linestate";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)       };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)     };