^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) NXP LPC18xx/43xx internal USB OTG PHY binding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) ---------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) This file contains documentation for the internal USB OTG PHY found
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) in NXP LPC18xx and LPC43xx SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) - compatible : must be "nxp,lpc1850-usb-otg-phy"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - clocks : must be exactly one entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) See: Documentation/devicetree/bindings/clock/clock-bindings.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - #phy-cells : must be 0 for this phy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) See: Documentation/devicetree/bindings/phy/phy-bindings.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) The phy node must be a child of the creg syscon node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) creg: syscon@40043000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) compatible = "nxp,lpc1850-creg", "syscon", "simple-mfd";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) reg = <0x40043000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) usb0_otg_phy: phy {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) compatible = "nxp,lpc1850-usb-otg-phy";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) clocks = <&ccu1 CLK_USB0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #phy-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) };