^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Hisilicon hix5hd2 SATA PHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) -----------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - compatible: should be "hisilicon,hix5hd2-sata-phy"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) - reg: offset and length of the PHY registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - #phy-cells: must be 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Refer to phy/phy-bindings.txt for the generic PHY binding properties
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) Optional Properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - hisilicon,peripheral-syscon: phandle of syscon used to control peripheral.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - hisilicon,power-reg: offset and bit number within peripheral-syscon,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) register of controlling sata power supply.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) sata_phy: phy@f9900000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) compatible = "hisilicon,hix5hd2-sata-phy";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) reg = <0xf9900000 0x10000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #phy-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) hisilicon,peripheral-syscon = <&peripheral_ctrl>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) hisilicon,power-reg = <0x8 10>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) };