^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Device tree binding documentation for am816x USB PHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) =========================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - compatible : should be "ti,dm816x-usb-phy"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) - reg : offset and length of the PHY register set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - reg-names : name for the phy registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) - clocks : phandle to the clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - clock-names : name of the clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - syscon: phandle for the syscon node to access misc registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - #phy-cells : from the generic PHY bindings, must be 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - syscon: phandle for the syscon node to access misc registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) usb_phy0: usb-phy@20 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) compatible = "ti,dm8168-usb-phy";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) reg = <0x20 0x8>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) reg-names = "phy";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) clocks = <&main_fapll 6>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) clock-names = "refclk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #phy-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) syscon = <&scm_conf>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) };