Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Driver for Broadcom Northstar USB 2.0 PHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - compatible: brcm,ns-usb2-phy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) - reg: iomem address range of DMU (Device Management Unit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) - reg-names: "dmu", the only needed & supported reg right now
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - clocks: USB PHY reference clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) - clock-names: "phy-ref-clk", the only needed & supported clock right now
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) To initialize USB 2.0 PHY driver needs to setup PLL correctly. To do this it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) requires passing phandle to the USB PHY reference clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	usb2-phy {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 		compatible = "brcm,ns-usb2-phy";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 		reg = <0x1800c000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 		reg-names = "dmu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 		#phy-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 		clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 		clock-names = "phy-ref-clk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	};