Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) $id: http://devicetree.org/schemas/perf/fsl-imx-ddr.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) title: Freescale(NXP) IMX8 DDR performance monitor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)   - Frank Li <frank.li@nxp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)   compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)     oneOf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)       - enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)           - fsl,imx8-ddr-pmu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)           - fsl,imx8m-ddr-pmu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)           - fsl,imx8mp-ddr-pmu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)       - items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)           - enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)               - fsl,imx8mm-ddr-pmu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)               - fsl,imx8mn-ddr-pmu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)               - fsl,imx8mq-ddr-pmu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)               - fsl,imx8mp-ddr-pmu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)           - const: fsl,imx8m-ddr-pmu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)   reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)   interrupts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)   - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)   - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)   - interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) additionalProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)   - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)     #include <dt-bindings/interrupt-controller/arm-gic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)     ddr-pmu@5c020000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)         compatible = "fsl,imx8-ddr-pmu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)         reg = <0x5c020000 0x10000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)         interrupt-parent = <&gic>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)     };