^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) * APM X-Gene SoC PMU bindings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) This is APM X-Gene SoC PMU (Performance Monitoring Unit) module.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) The following PMU devices are supported:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) L3C - L3 cache controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) IOB - IO bridge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) MCB - Memory controller bridge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) MC - Memory controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) The following section describes the SoC PMU DT node binding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - compatible : Shall be "apm,xgene-pmu" for revision 1 or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) "apm,xgene-pmu-v2" for revision 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - regmap-csw : Regmap of the CPU switch fabric (CSW) resource.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - regmap-mcba : Regmap of the MCB-A (memory bridge) resource.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - regmap-mcbb : Regmap of the MCB-B (memory bridge) resource.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - reg : First resource shall be the CPU bus PMU resource.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - interrupts : Interrupt-specifier for PMU IRQ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) Required properties for L3C subnode:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - compatible : Shall be "apm,xgene-pmu-l3c".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - reg : First resource shall be the L3C PMU resource.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) Required properties for IOB subnode:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - compatible : Shall be "apm,xgene-pmu-iob".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) - reg : First resource shall be the IOB PMU resource.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) Required properties for MCB subnode:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) - compatible : Shall be "apm,xgene-pmu-mcb".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) - reg : First resource shall be the MCB PMU resource.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) - enable-bit-index : The bit indicates if the according MCB is enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) Required properties for MC subnode:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) - compatible : Shall be "apm,xgene-pmu-mc".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) - reg : First resource shall be the MC PMU resource.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) - enable-bit-index : The bit indicates if the according MC is enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) csw: csw@7e200000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) compatible = "apm,xgene-csw", "syscon";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) reg = <0x0 0x7e200000 0x0 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) mcba: mcba@7e700000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) compatible = "apm,xgene-mcb", "syscon";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) reg = <0x0 0x7e700000 0x0 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) mcbb: mcbb@7e720000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) compatible = "apm,xgene-mcb", "syscon";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) reg = <0x0 0x7e720000 0x0 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) pmu: pmu@78810000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) compatible = "apm,xgene-pmu-v2";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #address-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #size-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) ranges;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) regmap-csw = <&csw>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) regmap-mcba = <&mcba>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) regmap-mcbb = <&mcbb>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) reg = <0x0 0x78810000 0x0 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) interrupts = <0x0 0x22 0x4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) pmul3c@7e610000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) compatible = "apm,xgene-pmu-l3c";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) reg = <0x0 0x7e610000 0x0 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) pmuiob@7e940000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) compatible = "apm,xgene-pmu-iob";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) reg = <0x0 0x7e940000 0x0 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) pmucmcb@7e710000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) compatible = "apm,xgene-pmu-mcb";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) reg = <0x0 0x7e710000 0x0 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) enable-bit-index = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) pmucmcb@7e730000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) compatible = "apm,xgene-pmu-mcb";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) reg = <0x0 0x7e730000 0x0 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) enable-bit-index = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) pmucmc@7e810000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) compatible = "apm,xgene-pmu-mc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) reg = <0x0 0x7e810000 0x0 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) enable-bit-index = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) pmucmc@7e850000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) compatible = "apm,xgene-pmu-mc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) reg = <0x0 0x7e850000 0x0 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) enable-bit-index = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) pmucmc@7e890000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) compatible = "apm,xgene-pmu-mc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) reg = <0x0 0x7e890000 0x0 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) enable-bit-index = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) pmucmc@7e8d0000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) compatible = "apm,xgene-pmu-mc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) reg = <0x0 0x7e8d0000 0x0 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) enable-bit-index = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
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Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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