Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * AppliedMicro X-Gene PCIe interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - device_type: set to "pci"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) - compatible: should contain "apm,xgene-pcie" to identify the core.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) - reg: A list of physical base address and length for each set of controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)        registers. Must contain an entry for each entry in the reg-names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)        property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - reg-names: Must include the following entries:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)   "csr": controller configuration registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)   "cfg": PCIe configuration space registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - #address-cells: set to <3>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - #size-cells: set to <2>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - ranges: ranges for the outbound memory, I/O regions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - dma-ranges: ranges for the inbound memory regions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - #interrupt-cells: set to <1>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - interrupt-map-mask and interrupt-map: standard PCI properties
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	to define the mapping of the PCIe interface to interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	numbers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - clocks: from common clock binding: handle to pci clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - status: Either "ok" or "disabled".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - dma-coherent: Present if DMA operations are coherent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	pcie0: pcie@1f2b0000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 		status = "disabled";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		device_type = "pci";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		compatible = "apm,xgene-storm-pcie", "apm,xgene-pcie";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		#interrupt-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		#size-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		#address-cells = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		reg = < 0x00 0x1f2b0000 0x0 0x00010000   /* Controller registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 			0xe0 0xd0000000 0x0 0x00040000>; /* PCI config space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		reg-names = "csr", "cfg";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		ranges = <0x01000000 0x00 0x00000000 0xe0 0x10000000 0x00 0x00010000   /* io */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 			  0x02000000 0x00 0x80000000 0xe1 0x80000000 0x00 0x80000000>; /* mem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		dma-ranges = <0x42000000 0x80 0x00000000 0x80 0x00000000 0x00 0x80000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 			      0x42000000 0x00 0x00000000 0x00 0x00000000 0x80 0x00000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 		interrupt-map-mask = <0x0 0x0 0x0 0x7>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 		interrupt-map = <0x0 0x0 0x0 0x1 &gic 0x0 0xc2 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 				 0x0 0x0 0x0 0x2 &gic 0x0 0xc3 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 				 0x0 0x0 0x0 0x3 &gic 0x0 0xc4 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 				 0x0 0x0 0x0 0x4 &gic 0x0 0xc5 0x1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 		dma-coherent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 		clocks = <&pcie0clk 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)