^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) V3 Semiconductor V360 EPC PCI bridge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) This bridge is found in the ARM Integrator/AP (Application Platform)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) - compatible: should be one of:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) "v3,v360epc-pci"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) "arm,integrator-ap-pci", "v3,v360epc-pci"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - reg: should contain two register areas:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) first the base address of the V3 host bridge controller, 64KB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) second the configuration area register space, 16MB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - interrupts: should contain a reference to the V3 error interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) as routed on the system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - bus-range: see pci.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - ranges: this follows the standard PCI bindings in the IEEE Std
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 1275-1994 (see pci.txt) with the following restriction:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - The non-prefetchable and prefetchable memory windows must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) each be exactly 256MB (0x10000000) in size.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - The prefetchable memory window must be immediately adjacent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) to the non-prefetcable memory window
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - dma-ranges: three ranges for the inbound memory region. The ranges must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) be aligned to a 1MB boundary, and may be 1MB, 2MB, 4MB, 8MB, 16MB, 32MB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 64MB, 128MB, 256MB, 512MB, 1GB or 2GB in size. The memory should be marked
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) as pre-fetchable. Two ranges are supported by the hardware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) Integrator-specific required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - syscon: should contain a link to the syscon device node, since
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) on the Integrator, some registers in the syscon are required to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) operate the V3 host bridge.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) pci: pciv3@62000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) compatible = "arm,integrator-ap-pci", "v3,v360epc-pci";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #interrupt-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #size-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #address-cells = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) reg = <0x62000000 0x10000>, <0x61000000 0x01000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) interrupt-parent = <&pic>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) interrupts = <17>; /* Bus error IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) clocks = <&pciclk>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) bus-range = <0x00 0xff>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) ranges = 0x01000000 0 0x00000000 /* I/O space @00000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 0x60000000 0 0x01000000 /* 16 MiB @ LB 60000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 0x02000000 0 0x40000000 /* non-prefectable memory @40000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 0x40000000 0 0x10000000 /* 256 MiB @ LB 40000000 1:1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 0x42000000 0 0x50000000 /* prefetchable memory @50000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 0x50000000 0 0x10000000>; /* 256 MiB @ LB 50000000 1:1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) dma-ranges = <0x02000000 0 0x20000000 /* EBI memory space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 0x20000000 0 0x20000000 /* 512 MB @ LB 20000000 1:1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 0x02000000 0 0x80000000 /* Core module alias memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 0x80000000 0 0x40000000>; /* 1GB @ LB 80000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) interrupt-map-mask = <0xf800 0 0 0x7>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) interrupt-map = <
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* IDSEL 9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 0x4800 0 0 1 &pic 13 /* INT A on slot 9 is irq 13 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 0x4800 0 0 2 &pic 14 /* INT B on slot 9 is irq 14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 0x4800 0 0 3 &pic 15 /* INT C on slot 9 is irq 15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 0x4800 0 0 4 &pic 16 /* INT D on slot 9 is irq 16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* IDSEL 10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 0x5000 0 0 1 &pic 14 /* INT A on slot 10 is irq 14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 0x5000 0 0 2 &pic 15 /* INT B on slot 10 is irq 15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 0x5000 0 0 3 &pic 16 /* INT C on slot 10 is irq 16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 0x5000 0 0 4 &pic 13 /* INT D on slot 10 is irq 13 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* IDSEL 11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 0x5800 0 0 1 &pic 15 /* INT A on slot 11 is irq 15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 0x5800 0 0 2 &pic 16 /* INT B on slot 11 is irq 16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 0x5800 0 0 3 &pic 13 /* INT C on slot 11 is irq 13 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 0x5800 0 0 4 &pic 14 /* INT D on slot 11 is irq 14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /* IDSEL 12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 0x6000 0 0 1 &pic 16 /* INT A on slot 12 is irq 16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 0x6000 0 0 2 &pic 13 /* INT B on slot 12 is irq 13 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 0x6000 0 0 3 &pic 14 /* INT C on slot 12 is irq 14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 0x6000 0 0 4 &pic 15 /* INT D on slot 12 is irq 15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) >;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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