^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Sigma Designs Tango PCIe controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - compatible: "sigma,smp8759-pcie"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) - reg: address/size of PCI configuration space, address/size of register area
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - bus-range: defined by size of PCI configuration space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) - device_type: "pci"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - #size-cells: <2>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - #address-cells: <3>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - msi-controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - ranges: translation from system to bus addresses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - interrupts: spec for misc interrupts, spec for MSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) pcie@2e000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) compatible = "sigma,smp8759-pcie";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) reg = <0x50000000 0x400000>, <0x2e000 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) bus-range = <0 3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) device_type = "pci";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #size-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #address-cells = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) msi-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) ranges = <0x02000000 0x0 0x00400000 0x50400000 0x0 0x3c00000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) interrupts =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) <54 IRQ_TYPE_LEVEL_HIGH>, /* misc interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) <55 IRQ_TYPE_LEVEL_HIGH>; /* MSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) };