^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) $id: http://devicetree.org/schemas/pci/intel-gw-pcie.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) title: PCIe RC controller on Intel Gateway SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - Dilip Kota <eswara.kota@linux.intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) select:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) contains:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) const: intel,lgm-pcie
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - const: intel,lgm-pcie
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - const: snps,dw-pcie
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) device_type:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) const: pci
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) "#address-cells":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) const: 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) "#size-cells":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) const: 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) - description: Controller control and status registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) - description: PCIe configuration registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) - description: Controller application registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) reg-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) - const: dbi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) - const: config
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) - const: app
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) ranges:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) resets:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) phys:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) phy-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) const: pcie
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) reset-gpios:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) linux,pci-domain: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) num-lanes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) maximum: 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) description: Number of lanes to use for this port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) '#interrupt-cells':
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) const: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) interrupt-map-mask:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) description: Standard PCI IRQ mapping properties.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) interrupt-map:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) description: Standard PCI IRQ mapping properties.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) max-link-speed:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) description: Specify PCI Gen for link capability.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) $ref: /schemas/types.yaml#/definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) enum: [1, 2, 3, 4]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) default: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) bus-range:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) description: Range of bus numbers associated with this controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) reset-assert-ms:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) Delay after asserting reset to the PCIe device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) maximum: 500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) default: 100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) - device_type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) - "#address-cells"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) - "#size-cells"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) - reg-names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) - ranges
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) - resets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) - clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) - phys
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) - phy-names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) - reset-gpios
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) - '#interrupt-cells'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) - interrupt-map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) - interrupt-map-mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) additionalProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #include <dt-bindings/gpio/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) pcie10: pcie@d0e00000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) compatible = "intel,lgm-pcie", "snps,dw-pcie";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) device_type = "pci";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #address-cells = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #size-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) reg = <0xd0e00000 0x1000>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) <0xd2000000 0x800000>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) <0xd0a41000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) reg-names = "dbi", "config", "app";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) linux,pci-domain = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) max-link-speed = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) bus-range = <0x00 0x08>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #interrupt-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) interrupt-map-mask = <0 0 0 0x7>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) interrupt-map = <0 0 0 1 &ioapic1 27 1>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) <0 0 0 2 &ioapic1 28 1>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) <0 0 0 3 &ioapic1 29 1>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) <0 0 0 4 &ioapic1 30 1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) ranges = <0x02000000 0 0xd4000000 0xd4000000 0 0x04000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) resets = <&rcu0 0x50 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) clocks = <&cgu0 120>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) phys = <&cb0phy0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) phy-names = "pcie";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) reset-assert-ms = <500>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) reset-gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) num-lanes = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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