Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * Altera PCIe controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - compatible :	should contain "altr,pcie-root-port-1.0" or "altr,pcie-root-port-2.0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) - reg:		a list of physical base address and length for TXS and CRA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 		For "altr,pcie-root-port-2.0", additional HIP base address and length.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - reg-names:	must include the following entries:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 		"Txs": TX slave port region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 		"Cra": Control register access region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 		"Hip": Hard IP region (if "altr,pcie-root-port-2.0")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - interrupts:	specifies the interrupt source of the parent interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 		controller.  The format of the interrupt specifier depends
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 		on the parent interrupt controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - device_type:	must be "pci"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - #address-cells:	set to <3>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - #size-cells:		set to <2>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - #interrupt-cells:	set to <1>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - ranges:	describes the translation of addresses for root ports and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 		standard PCI regions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - interrupt-map-mask and interrupt-map: standard PCI properties to define the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 		mapping of the PCIe interface to interrupt numbers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - msi-parent:	Link to the hardware entity that serves as the MSI controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 		for this PCIe controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) - bus-range:	PCI bus numbers covered
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) Example
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	pcie_0: pcie@c00000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		compatible = "altr,pcie-root-port-1.0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		reg = <0xc0000000 0x20000000>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 			<0xff220000 0x00004000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		reg-names = "Txs", "Cra";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		interrupt-parent = <&hps_0_arm_gic_0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		interrupts = <0 40 4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 		interrupt-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		#interrupt-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		bus-range = <0x0 0xFF>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		device_type = "pci";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		msi-parent = <&msi_to_gic_gen_0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		#address-cells = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 		#size-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 		interrupt-map-mask = <0 0 0 7>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 		interrupt-map = <0 0 0 1 &pcie_0 1>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 			            <0 0 0 2 &pcie_0 2>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 			            <0 0 0 3 &pcie_0 3>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 			            <0 0 0 4 &pcie_0 4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 		ranges = <0x82000000 0x00000000 0x00000000 0xc0000000 0x00000000 0x10000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 			  0x82000000 0x00000000 0x10000000 0xd0000000 0x00000000 0x10000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	};