^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) * NXP LPC18xx OTP memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Internal OTP (One Time Programmable) memory for NXP LPC18xx/43xx devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) - compatible: Should be "nxp,lpc1850-otp"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - reg: Must contain an entry with the physical base address and length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) for each entry in reg-names.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - address-cells: must be set to 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - size-cells: must be set to 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) See nvmem.txt for more information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) otp: otp@40045000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) compatible = "nxp,lpc1850-otp";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) reg = <0x40045000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #size-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) };