Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * Socionext NetSec Ethernet Controller IP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - compatible: Should be "socionext,synquacer-netsec"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) - reg: Address and length of the control register area, followed by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)        address and length of the EEPROM holding the MAC address and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)        microengine firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) - interrupts: Should contain ethernet controller interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - clocks: phandle to the PHY reference clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - clock-names: Should be "phy_ref_clk"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - phy-mode: See ethernet.txt file in the same directory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - phy-handle: See ethernet.txt in the same directory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - mdio device tree subnode: When the Netsec has a phy connected to its local
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 		mdio, there must be device tree subnode with the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 		required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	- #address-cells: Must be <1>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	- #size-cells: Must be <0>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	For each phy on the mdio bus, there must be a node with the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	fields:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	- compatible: Refer to phy.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	- reg: phy id used to communicate to phy.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) Optional properties: (See ethernet.txt file in the same directory)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - dma-coherent: Boolean property, must only be present if memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	accesses performed by the device are cache coherent.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) - max-speed: See ethernet.txt in the same directory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) - max-frame-size: See ethernet.txt in the same directory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) The MAC address will be determined using the optional properties
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) defined in ethernet.txt. The 'phy-mode' property is required, but may
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) be set to the empty string if the PHY configuration is programmed by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) the firmware or set by hardware straps, and needs to be preserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	eth0: ethernet@522d0000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		compatible = "socionext,synquacer-netsec";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		reg = <0 0x522d0000 0x0 0x10000>, <0 0x10000000 0x0 0x10000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 		clocks = <&clk_netsec>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 		clock-names = "phy_ref_clk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 		phy-mode = "rgmii";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 		max-speed = <1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 		max-frame-size = <9000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 		phy-handle = <&phy1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 		mdio {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 			#address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 			#size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 			phy1: ethernet-phy@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 				compatible = "ethernet-phy-ieee802.3-c22";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 				reg = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 			};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 		};