^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) * Microsemi - vsc8531 Giga bit ethernet phy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) - vsc8531,vddmac : The vddmac in mV. Allowed values is listed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) in the first row of Table 1 (below).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) This property is only used in combination
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) with the 'edge-slowdown' property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Default value is 3300.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - vsc8531,edge-slowdown : % the edge should be slowed down relative to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) the fastest possible edge time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Edge rate sets the drive strength of the MAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) interface output signals. Changing the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) drive strength will affect the edge rate of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) the output signal. The goal of this setting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) is to help reduce electrical emission (EMI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) by being able to reprogram drive strength
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) and in effect slow down the edge rate if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) desired.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) To adjust the edge-slowdown, the 'vddmac'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) must be specified. Table 1 lists the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) supported edge-slowdown values for a given
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 'vddmac'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) Default value is 0%.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) Ref: Table:1 - Edge rate change (below).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) - vsc8531,led-[N]-mode : LED mode. Specify how the LED[N] should behave.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) N depends on the number of LEDs supported by a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) PHY.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) Allowed values are defined in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) "include/dt-bindings/net/mscc-phy-vsc8531.h".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) Default values are VSC8531_LINK_1000_ACTIVITY (1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) VSC8531_LINK_100_ACTIVITY (2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) VSC8531_LINK_ACTIVITY (0) and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) VSC8531_DUPLEX_COLLISION (8).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) - load-save-gpios : GPIO used for the load/save operation of the PTP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) hardware clock (PHC).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) Table: 1 - Edge rate change
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) ----------------------------------------------------------------|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) | Edge Rate Change (VDDMAC) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) | 3300 mV 2500 mV 1800 mV 1500 mV |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) |---------------------------------------------------------------|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) | 0% 0% 0% 0% |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) | (Fastest) (recommended) (recommended) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) |---------------------------------------------------------------|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) | 2% 3% 5% 6% |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) |---------------------------------------------------------------|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) | 4% 6% 9% 14% |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) |---------------------------------------------------------------|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) | 7% 10% 16% 21% |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) |(recommended) (recommended) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) |---------------------------------------------------------------|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) | 10% 14% 23% 29% |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) |---------------------------------------------------------------|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) | 17% 23% 35% 42% |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) |---------------------------------------------------------------|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) | 29% 37% 52% 58% |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) |---------------------------------------------------------------|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) | 53% 63% 76% 77% |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) | (slowest) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) |---------------------------------------------------------------|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) vsc8531_0: ethernet-phy@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) compatible = "ethernet-phy-id0007.0570";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) vsc8531,vddmac = <3300>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) vsc8531,edge-slowdown = <7>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) vsc8531,led-0-mode = <LINK_1000_ACTIVITY>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) vsc8531,led-1-mode = <LINK_100_ACTIVITY>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) load-save-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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