Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Micrel PHY properties.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) These properties cover the base properties Micrel PHYs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  - micrel,led-mode : LED mode value to set for PHYs with configurable LEDs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 	Configure the LED mode with single value. The list of PHYs and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 	bits that are currently supported:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	KSZ8001: register 0x1e, bits 15..14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	KSZ8041: register 0x1e, bits 15..14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	KSZ8021: register 0x1f, bits 5..4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	KSZ8031: register 0x1f, bits 5..4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	KSZ8051: register 0x1f, bits 5..4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	KSZ8081: register 0x1f, bits 5..4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	KSZ8091: register 0x1f, bits 5..4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	See the respective PHY datasheet for the mode values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  - micrel,rmii-reference-clock-select-25-mhz: RMII Reference Clock Select
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 						bit selects 25 MHz mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	Setting the RMII Reference Clock Select bit enables 25 MHz rather
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	than 50 MHz clock mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	Note that this option in only needed for certain PHY revisions with a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	non-standard, inverted function of this configuration bit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	Specifically, a clock reference ("rmii-ref" below) is always needed to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	actually select a mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)  - clocks, clock-names: contains clocks according to the common clock bindings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	supported clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	- KSZ8021, KSZ8031, KSZ8081, KSZ8091: "rmii-ref": The RMII reference
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	  input clock. Used to determine the XI input clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)  - micrel,fiber-mode: If present the PHY is configured to operate in fiber mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	Some PHYs, such as the KSZ8041FTL variant, support fiber mode, enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	by the FXEN boot strapping pin. It can't be determined from the PHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	registers whether the PHY is in fiber mode, so this boolean device tree
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	property can be used to describe it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	In fiber mode, auto-negotiation is disabled and the PHY can only work in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	100base-fx (full and half duplex) modes.