^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Micrel KSZ9021/KSZ9031/KSZ9131 Gigabit Ethernet PHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Some boards require special tuning values, particularly when it comes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) to clock delays. You can specify clock delay values in the PHY OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) device node. Deprecated, but still supported, these properties can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) also be added to an Ethernet OF device node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Note that these settings are applied after any phy-specific fixup from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) phy_fixup_list (see phy_init_hw() from drivers/net/phy/phy_device.c),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) and therefore may overwrite them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) KSZ9021:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) All skew control options are specified in picoseconds. The minimum
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) value is 0, the maximum value is 3000, and it can be specified in 200ps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) steps, *but* these values are in not fact what you get because this chip's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) skew values actually increase in 120ps steps, starting from -840ps. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) incorrect values came from an error in the original KSZ9021 datasheet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) before it was corrected in revision 1.2 (Feb 2014), but it is too late to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) change the driver now because of the many existing device trees that have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) been created using values that go up in increments of 200.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) The following table shows the actual skew delay you will get for each of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) possible devicetree values, and the number that will be programmed into the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) corresponding pad skew register:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) Device Tree Value Delay Pad Skew Register Value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) -----------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 0 -840ps 0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 200 -720ps 0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 400 -600ps 0010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 600 -480ps 0011
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 800 -360ps 0100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 1000 -240ps 0101
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 1200 -120ps 0110
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 1400 0ps 0111
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 1600 120ps 1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 1800 240ps 1001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 2000 360ps 1010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 2200 480ps 1011
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 2400 600ps 1100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 2600 720ps 1101
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 2800 840ps 1110
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 3000 960ps 1111
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) - rxc-skew-ps : Skew control of RXC pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) - rxdv-skew-ps : Skew control of RX CTL pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) - txc-skew-ps : Skew control of TXC pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) - txen-skew-ps : Skew control of TX CTL pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) - rxd0-skew-ps : Skew control of RX data 0 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) - rxd1-skew-ps : Skew control of RX data 1 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) - rxd2-skew-ps : Skew control of RX data 2 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) - rxd3-skew-ps : Skew control of RX data 3 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) - txd0-skew-ps : Skew control of TX data 0 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) - txd1-skew-ps : Skew control of TX data 1 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) - txd2-skew-ps : Skew control of TX data 2 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) - txd3-skew-ps : Skew control of TX data 3 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) KSZ9031:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) All skew control options are specified in picoseconds. The minimum
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) value is 0, and the maximum is property-dependent. The increment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) step is 60ps. The default value is the neutral setting, so setting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) rxc-skew-ps=<0> actually results in -900 picoseconds adjustment.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) Maximum value of 1860, default value 900:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) - rxc-skew-ps : Skew control of RX clock pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) - txc-skew-ps : Skew control of TX clock pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) Maximum value of 900, default value 420:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) - rxdv-skew-ps : Skew control of RX CTL pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) - txen-skew-ps : Skew control of TX CTL pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) - rxd0-skew-ps : Skew control of RX data 0 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) - rxd1-skew-ps : Skew control of RX data 1 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) - rxd2-skew-ps : Skew control of RX data 2 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) - rxd3-skew-ps : Skew control of RX data 3 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) - txd0-skew-ps : Skew control of TX data 0 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) - txd1-skew-ps : Skew control of TX data 1 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) - txd2-skew-ps : Skew control of TX data 2 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) - txd3-skew-ps : Skew control of TX data 3 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) - micrel,force-master:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) Boolean, force phy to master mode. Only set this option if the phy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) reference clock provided at CLK125_NDO pin is used as MAC reference
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) clock because the clock jitter in slave mode is to high (errata#2).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) Attention: The link partner must be configurable as slave otherwise
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) no link will be established.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) KSZ9131:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) All skew control options are specified in picoseconds. The increment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) step is 100ps. Unlike KSZ9031, the values represent picoseccond delays.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) A negative value can be assigned as rxc-skew-psec = <(-100)>;.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) Range of the value -700 to 2400, default value 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) - rxc-skew-psec : Skew control of RX clock pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) - txc-skew-psec : Skew control of TX clock pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) Range of the value -700 to 800, default value 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) - rxdv-skew-psec : Skew control of RX CTL pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) - txen-skew-psec : Skew control of TX CTL pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) - rxd0-skew-psec : Skew control of RX data 0 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) - rxd1-skew-psec : Skew control of RX data 1 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) - rxd2-skew-psec : Skew control of RX data 2 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) - rxd3-skew-psec : Skew control of RX data 3 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) - txd0-skew-psec : Skew control of TX data 0 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) - txd1-skew-psec : Skew control of TX data 1 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) - txd2-skew-psec : Skew control of TX data 2 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) - txd3-skew-psec : Skew control of TX data 3 pad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) Examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) mdio {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) phy0: ethernet-phy@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) rxc-skew-ps = <3000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) rxdv-skew-ps = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) txc-skew-ps = <3000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) txen-skew-ps = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) reg = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) ethernet@70000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) phy = <&phy0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) phy-mode = "rgmii-id";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) };