^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) MediaTek SoC built-in Bluetooth Devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) ==================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) This device is a serial attached device to BTIF device and thus it must be a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) child node of the serial node with BTIF. The dt-bindings details for BTIF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) device can be known via Documentation/devicetree/bindings/serial/8250.yaml.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - compatible: Must be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) "mediatek,mt7622-bluetooth": for MT7622 SoC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - clocks: Should be the clock specifiers corresponding to the entry in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) clock-names property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - clock-names: Should contain "ref" entries.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - power-domains: Phandle to the power domain that the device is part of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) btif: serial@1100c000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) compatible = "mediatek,mt7622-btif",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) "mediatek,mtk-btif";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) reg = <0 0x1100c000 0 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_LOW>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) clocks = <&pericfg CLK_PERI_BTIF_PD>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) clock-names = "main";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) reg-shift = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) reg-io-width = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) bluetooth {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) compatible = "mediatek,mt7622-bluetooth";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) power-domains = <&scpsys MT7622_POWER_DOMAIN_WB>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) clocks = <&clk25m>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) clock-names = "ref";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) MediaTek UART based Bluetooth Devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) ==================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) This device is a serial attached device to UART device and thus it must be a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) child node of the serial node with UART.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) Please refer to the following documents for generic properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) Documentation/devicetree/bindings/serial/serial.yaml
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) - compatible: Must be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) "mediatek,mt7663u-bluetooth": for MT7663U device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) "mediatek,mt7668u-bluetooth": for MT7668U device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) - vcc-supply: Main voltage regulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) If the pin controller on the platform can support both pinmux and GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) control such as the most of MediaTek platform. Please use below properties.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) - pinctrl-names: Should be "default", "runtime"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) - pinctrl-0: Should contain UART RXD low when the device is powered up to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) enter proper bootstrap mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) - pinctrl-1: Should contain UART mode pin ctrl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) Else, the pin controller on the platform only can support pinmux control and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) the GPIO control still has to rely on the dedicated GPIO controller such as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) a legacy MediaTek SoC, MT7621. Please use the below properties.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) - boot-gpios: GPIO same to the pin as UART RXD and used to keep LOW when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) the device is powered up to enter proper bootstrap mode when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) - pinctrl-names: Should be "default"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) - pinctrl-0: Should contain UART mode pin ctrl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) - reset-gpios: GPIO used to reset the device whose initial state keeps low,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) if the GPIO is missing, then board-level design should be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) guaranteed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) - clocks: Should be the clock specifiers corresponding to the entry in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) clock-names property. If the clock is missing, then board-level
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) design should be guaranteed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) - clock-names: Should contain "osc" entry for the external oscillator.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) - current-speed: Current baud rate of the device whose defaults to 921600
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) uart1_pins_boot: uart1-default {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) pins-dat {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) pinmux = <MT7623_PIN_81_URXD1_FUNC_GPIO81>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) output-low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) uart1_pins_runtime: uart1-runtime {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) pins-dat {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) pinmux = <MT7623_PIN_81_URXD1_FUNC_URXD1>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) <MT7623_PIN_82_UTXD1_FUNC_UTXD1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) uart1: serial@11003000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) compatible = "mediatek,mt7623-uart",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) "mediatek,mt6577-uart";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) reg = <0 0x11003000 0 0x400>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) clocks = <&pericfg CLK_PERI_UART1_SEL>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) <&pericfg CLK_PERI_UART1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) clock-names = "baud", "bus";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) bluetooth {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) compatible = "mediatek,mt7663u-bluetooth";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) vcc-supply = <®_5v>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) reset-gpios = <&pio 24 GPIO_ACTIVE_LOW>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) pinctrl-names = "default", "runtime";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) pinctrl-0 = <&uart1_pins_boot>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) pinctrl-1 = <&uart1_pins_runtime>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) current-speed = <921600>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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