Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) $id: http://devicetree.org/schemas/net/mdio.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) title: MDIO Bus Generic Binding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)   - Andrew Lunn <andrew@lunn.ch>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)   - Florian Fainelli <f.fainelli@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)   - Heiner Kallweit <hkallweit1@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)   These are generic properties that can apply to any MDIO bus. Any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)   MDIO bus must have a list of child nodes, one per device on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)   bus. These should follow the generic ethernet-phy.yaml document, or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)   a device specific binding document.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)   $nodename:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)     pattern: "^mdio(@.*)?"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)   "#address-cells":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)     const: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)   "#size-cells":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)     const: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)   reset-gpios:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)       The phandle and specifier for the GPIO that controls the RESET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)       lines of all devices on that MDIO bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)   reset-delay-us:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)       RESET pulse width in microseconds. It applies to all MDIO devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)       and must therefore be appropriately determined based on all devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)       requirements (maximum value of all per-device RESET pulse widths).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)   reset-post-delay-us:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)       Delay after reset deassert in microseconds. It applies to all MDIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)       devices and it's determined by how fast all devices are ready for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)       communication. This delay happens just before e.g. Ethernet PHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47)       type ID auto detection.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)   clock-frequency:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51)       Desired MDIO bus clock frequency in Hz. Values greater than IEEE 802.3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52)       defined 2.5MHz should only be used when all devices on the bus support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)       the given clock speed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55)   suppress-preamble:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)     description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)       The 32 bit preamble should be suppressed. In order for this to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)       work, all devices on the bus must support suppressed preamble.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59)     type: boolean
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) patternProperties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62)   "^ethernet-phy@[0-9a-f]+$":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63)     type: object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65)     properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66)       reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67)         minimum: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68)         maximum: 31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69)         description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70)           The ID number for the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72)       broken-turn-around:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73)         $ref: /schemas/types.yaml#definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74)         description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75)           If set, indicates the MDIO device does not correctly release
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76)           the turn around line low at end of the control phase of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77)           MDIO transaction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79)       resets:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80)         maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82)       reset-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83)         const: phy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85)       reset-gpios:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86)         maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87)         description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88)           The GPIO phandle and specifier for the MDIO reset signal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90)       reset-assert-us:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91)         description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92)           Delay after the reset was asserted in microseconds. If this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93)           property is missing the delay will be skipped.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95)       reset-deassert-us:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96)         description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97)           Delay after the reset was deasserted in microseconds. If
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98)           this property is missing the delay will be skipped.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)     required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)       - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) additionalProperties: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)   - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)     davinci_mdio: mdio@5c030000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)         reg = <0x5c030000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)         #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)         #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)         reset-gpios = <&gpio2 5 1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)         reset-delay-us = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)         ethphy0: ethernet-phy@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)             reg = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)         };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)         ethphy1: ethernet-phy@3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)             reg = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)         };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)     };