^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) * Marvell Armada 375 Ethernet Controller (PPv2.1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) Marvell Armada 7K/8K Ethernet Controller (PPv2.2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) - compatible: should be one of:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) "marvell,armada-375-pp2"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) "marvell,armada-7k-pp2"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - reg: addresses and length of the register sets for the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) For "marvell,armada-375-pp2", must contain the following register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) sets:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - common controller registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - LMS registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - one register area per Ethernet port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) For "marvell,armada-7k-pp2", must contain the following register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) sets:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - packet processor registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - networking interfaces registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - clocks: pointers to the reference clocks for this device, consequently:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - main controller clock (for both armada-375-pp2 and armada-7k-pp2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - GOP clock (for both armada-375-pp2 and armada-7k-pp2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - MG clock (only for armada-7k-pp2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - MG Core clock (only for armada-7k-pp2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) - AXI clock (only for armada-7k-pp2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) - clock-names: names of used clocks, must be "pp_clk", "gop_clk", "mg_clk",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) "mg_core_clk" and "axi_clk" (the 3 latter only for armada-7k-pp2).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) The ethernet ports are represented by subnodes. At least one port is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) required.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) Required properties (port):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) - interrupts: interrupt(s) for the port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) - port-id: ID of the port from the MAC point of view
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) - gop-port-id: only for marvell,armada-7k-pp2, ID of the port from the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) GOP (Group Of Ports) point of view. This ID is used to index the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) per-port registers in the second register area.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) - phy-mode: See ethernet.txt file in the same directory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) Optional properties (port):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) - marvell,loopback: port is loopback mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) - phy: a phandle to a phy node defining the PHY address (as the reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) property, a single integer).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) - interrupt-names: if more than a single interrupt for is given, must be the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) name associated to the interrupts listed. Valid names are:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) "hifX", with X in [0..8], and "link". The names "tx-cpu0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) "tx-cpu1", "tx-cpu2", "tx-cpu3" and "rx-shared" are supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) for backward compatibility but shouldn't be used for new
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) additions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) - marvell,system-controller: a phandle to the system controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) Example for marvell,armada-375-pp2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) ethernet@f0000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) compatible = "marvell,armada-375-pp2";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) reg = <0xf0000 0xa000>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) <0xc0000 0x3060>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) <0xc4000 0x100>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) <0xc5000 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) clocks = <&gateclk 3>, <&gateclk 19>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) clock-names = "pp_clk", "gop_clk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) eth0: eth0@c4000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) port-id = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) phy = <&phy0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) phy-mode = "gmii";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) eth1: eth1@c5000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) port-id = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) phy = <&phy3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) phy-mode = "gmii";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) Example for marvell,armada-7k-pp2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) cpm_ethernet: ethernet@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) compatible = "marvell,armada-7k-pp22";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) reg = <0x0 0x100000>, <0x129000 0xb000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) <&cpm_syscon0 1 5>, <&cpm_syscon0 1 6>, <&cpm_syscon0 1 18>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) clock-names = "pp_clk", "gop_clk", "mg_clk", "mg_core_clk", "axi_clk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) eth0: eth0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) interrupts = <ICU_GRP_NSR 39 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) <ICU_GRP_NSR 43 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) <ICU_GRP_NSR 47 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) <ICU_GRP_NSR 51 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) <ICU_GRP_NSR 55 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) <ICU_GRP_NSR 59 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) <ICU_GRP_NSR 63 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) <ICU_GRP_NSR 67 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) <ICU_GRP_NSR 71 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) <ICU_GRP_NSR 129 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) "hif5", "hif6", "hif7", "hif8", "link";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) port-id = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) gop-port-id = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) eth1: eth1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) interrupts = <ICU_GRP_NSR 40 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) <ICU_GRP_NSR 44 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) <ICU_GRP_NSR 48 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) <ICU_GRP_NSR 52 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) <ICU_GRP_NSR 56 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) <ICU_GRP_NSR 60 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) <ICU_GRP_NSR 64 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) <ICU_GRP_NSR 68 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) <ICU_GRP_NSR 72 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) <ICU_GRP_NSR 128 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) "hif5", "hif6", "hif7", "hif8", "link";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) port-id = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) gop-port-id = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) eth2: eth2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) interrupts = <ICU_GRP_NSR 41 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) <ICU_GRP_NSR 45 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) <ICU_GRP_NSR 49 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) <ICU_GRP_NSR 53 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) <ICU_GRP_NSR 57 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) <ICU_GRP_NSR 61 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) <ICU_GRP_NSR 65 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) <ICU_GRP_NSR 69 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) <ICU_GRP_NSR 73 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) <ICU_GRP_NSR 127 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) "hif5", "hif6", "hif7", "hif8", "link";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) port-id = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) gop-port-id = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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