Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * Marvell Armada 370 / Armada XP / Armada 3700 Ethernet Controller (NETA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - compatible: could be one of the following:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 	"marvell,armada-370-neta"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 	"marvell,armada-xp-neta"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 	"marvell,armada-3700-neta"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) - reg: address and length of the register set for the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - interrupts: interrupt for the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - phy: See ethernet.txt file in the same directory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - phy-mode: See ethernet.txt file in the same directory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - clocks: List of clocks for this device. At least one clock is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)   mandatory for the core clock. If several clocks are given, then the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)   clock-names property must be used to identify them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - tx-csum-limit: maximum mtu supported by port that allow TX checksum.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)   Value is presented in bytes. If not used, by default 1600B is set for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)   "marvell,armada-370-neta" and 9800B for others.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - clock-names: List of names corresponding to clocks property; shall be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)   "core" for core clock and "bus" for the optional bus clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - phys: comphy for the ethernet port, see ../phy/phy-bindings.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) Optional properties (valid only for Armada XP/38x):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) - buffer-manager: a phandle to a buffer manager node. Please refer to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)   Documentation/devicetree/bindings/net/marvell-neta-bm.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) - bm,pool-long: ID of a pool, that will accept all packets of a size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)   higher than 'short' pool's threshold (if set) and up to MTU value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)   Obligatory, when the port is supposed to use hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)   buffer management.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) - bm,pool-short: ID of a pool, that will be used for accepting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)   packets of a size lower than given threshold. If not set, the port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)   will use a single 'long' pool for all packets, as defined above.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) ethernet@70000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	compatible = "marvell,armada-370-neta";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	reg = <0x70000 0x2500>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	interrupts = <8>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	clocks = <&gate_clk 4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	tx-csum-limit = <9800>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	phy = <&phy0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	phy-mode = "rgmii-id";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	buffer-manager = <&bm>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	bm,pool-long = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	bm,pool-short = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };