^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) * NXP LPC32xx SoC Ethernet Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) - compatible: Should be "nxp,lpc-eth"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - reg: Address and length of the register set for the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) - interrupts: Should contain ethernet controller interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - phy-mode: See ethernet.txt file in the same directory. If the property is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) absent, "rmii" is assumed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - use-iram: Use LPC32xx internal SRAM (IRAM) for DMA buffering
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Optional subnodes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - mdio : specifies the mdio bus, used as a container for phy nodes according to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) phy.txt in the same directory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) mac: ethernet@31060000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) compatible = "nxp,lpc-eth";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) reg = <0x31060000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) interrupt-parent = <&mic>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) interrupts = <29 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) phy-mode = "rmii";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) use-iram;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };