^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) This document describes the device tree bindings associated with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) keystone network coprocessor(NetCP) driver support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) The network coprocessor (NetCP) is a hardware accelerator that processes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) Ethernet packets. NetCP has a gigabit Ethernet (GbE) subsystem with a ethernet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) switch sub-module to send and receive packets. NetCP also includes a packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) accelerator (PA) module to perform packet classification operations such as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) header matching, and packet modification operations such as checksum
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) generation. NetCP can also optionally include a Security Accelerator (SA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) capable of performing IPSec operations on ingress/egress packets.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) Keystone II SoC's also have a 10 Gigabit Ethernet Subsystem (XGbE) which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) includes a 3-port Ethernet switch sub-module capable of 10Gb/s and 1Gb/s rates
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) per Ethernet port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) Keystone NetCP driver has a plug-in module architecture where each of the NetCP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) sub-modules exist as a loadable kernel module which plug in to the netcp core.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) These sub-modules are represented as "netcp-devices" in the dts bindings. It is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) mandatory to have the ethernet switch sub-module for the ethernet interface to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) be operational. Any other sub-module like the PA is optional.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) NetCP Ethernet SubSystem Layout:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) -----------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) NetCP subsystem(10G or 1G)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) -----------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) |-> NetCP Devices -> |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) | |-> GBE/XGBE Switch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) | |-> Packet Accelerator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) | |-> Security Accelerator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) |-> NetCP Interfaces -> |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) |-> Ethernet Port 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) |-> Ethernet Port 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) |-> Ethernet Port 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) |-> Ethernet Port 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) NetCP subsystem properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) - compatible: Should be "ti,netcp-1.0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) - clocks: phandle to the reference clocks for the subsystem.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) - dma-id: Navigator packet dma instance id.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) - ranges: address range of NetCP (includes, Ethernet SS, PA and SA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) - reg: register location and the size for the following register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) regions in the specified order.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) - Efuse MAC address register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) - dma-coherent: Present if dma operations are coherent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) - big-endian: Keystone devices can be operated in a mode where the DSP is in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) the big endian mode. In such cases enable this option. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) option should also be enabled if the ARM is operated in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) big endian mode with the DSP in little endian.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) NetCP device properties: Device specification for NetCP sub-modules.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 1Gb/10Gb (gbe/xgbe) ethernet switch sub-module specifications.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) - label: Must be "netcp-gbe" for 1Gb & "netcp-xgbe" for 10Gb.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) - compatible: Must be one of below:-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) "ti,netcp-gbe" for 1GbE on NetCP 1.4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) "ti,netcp-gbe-5" for 1GbE N NetCP 1.5 (N=5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) "ti,netcp-gbe-9" for 1GbE N NetCP 1.5 (N=9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) "ti,netcp-gbe-2" for 1GbE N NetCP 1.5 (N=2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) "ti,netcp-xgbe" for 10 GbE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) - reg: register location and the size for the following register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) regions in the specified order.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) - switch subsystem registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) - sgmii port3/4 module registers (only for NetCP 1.4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) - switch module registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) - serdes registers (only for 10G)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) NetCP 1.4 ethss, here is the order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) index #0 - switch subsystem registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) index #1 - sgmii port3/4 module registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) index #2 - switch module registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) NetCP 1.5 ethss 9 port, 5 port and 2 port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) index #0 - switch subsystem registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) index #1 - switch module registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) index #2 - serdes registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) - tx-channel: the navigator packet dma channel name for tx.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) - tx-queue: the navigator queue number associated with the tx dma channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) - interfaces: specification for each of the switch port to be registered as a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) network interface in the stack.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) -- slave-port: Switch port number, 0 based numbering.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) -- link-interface: type of link interface, supported options are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) - mac<->mac auto negotiate mode: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) - mac<->phy mode: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) - mac<->mac forced mode: 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) - mac<->fiber mode: 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) - mac<->phy mode with no mdio: 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) - 10Gb mac<->phy mode : 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) - 10Gb mac<->mac forced mode : 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) ----phy-handle: phandle to PHY device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) - cpts: sub-node time synchronization (CPTS) submodule configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) -- clocks: CPTS reference clock. Should point on cpts-refclk-mux clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) -- clock-names: should be "cpts"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) -- cpts-refclk-mux: multiplexer clock definition sub-node for CPTS reference (RFTCLK) clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) --- #clock-cells: should be 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) --- clocks: list of CPTS reference (RFTCLK) clock's parents as defined in Data manual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) --- ti,mux-tbl: array of multiplexer indexes as defined in Data manual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) --- assigned-clocks: should point on cpts-refclk-mux clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) --- assigned-clock-parents: should point on required RFTCLK clock parent to be selected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) -- cpts_clock_mult: (optional) Numerator to convert input clock ticks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) into nanoseconds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) -- cpts_clock_shift: (optional) Denominator to convert input clock ticks into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) nanoseconds.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) Mult and shift will be calculated basing on CPTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) rftclk frequency if both cpts_clock_shift and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) cpts_clock_mult properties are not provided.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) - enable-ale: NetCP driver keeps the address learning feature in the ethernet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) switch module disabled. This attribute is to enable the address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) learning.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) - secondary-slave-ports: specification for each of the switch port not be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) registered as a network interface. NetCP driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) will only initialize these ports and attach PHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) driver to them if needed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) NetCP interface properties: Interface specification for NetCP sub-modules.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) - rx-channel: the navigator packet dma channel name for rx.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) - rx-queue: the navigator queue number associated with rx dma channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) - rx-pool: specifies the number of descriptors to be used & the region-id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) for creating the rx descriptor pool.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) - tx-pool: specifies the number of descriptors to be used & the region-id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) for creating the tx descriptor pool.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) - rx-queue-depth: number of descriptors in each of the free descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) queue (FDQ) for the pktdma Rx flow. There can be at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) present a maximum of 4 queues per Rx flow.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) - rx-buffer-size: the buffer size for each of the Rx flow FDQ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) - tx-completion-queue: the navigator queue number where the descriptors are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) recycled after Tx DMA completion.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) - efuse-mac: If this is 1, then the MAC address for the interface is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) obtained from the device efuse mac address register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) If this is 2, the two DWORDs occupied by the MAC address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) are swapped. The netcp driver will swap the two DWORDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) back to the proper order when this property is set to 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) when it obtains the mac address from efuse.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) - "netcp-device label": phandle to the device specification for each of NetCP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) sub-module attached to this interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) The MAC address will be determined using the optional properties defined in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) ethernet.txt and only if efuse-mac is set to 0. If all of the optional MAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) address properties are not present, then the driver will use a random MAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) Example binding:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) netcp: netcp@2000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) reg = <0x2620110 0x8>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) reg-names = "efuse";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) compatible = "ti,netcp-1.0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #size-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) ranges = <0 0x2000000 0xfffff>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) clocks = <&papllclk>, <&clkcpgmac>, <&chipclk12>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) dma-coherent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) /* big-endian; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) dma-id = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) netcp-devices {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #size-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) ranges;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) gbe@90000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) label = "netcp-gbe";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) reg = <0x90000 0x300>, <0x90400 0x400>, <0x90800 0x700>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) /* enable-ale; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) tx-queue = <648>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) tx-channel = <8>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) cpts {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) clocks = <&cpts_refclk_mux>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) clock-names = "cpts";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) cpts_refclk_mux: cpts-refclk-mux {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) #clock-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) clocks = <&chipclk12>, <&chipclk13>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) <&timi0>, <&timi1>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) <&tsipclka>, <&tsrefclk>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) <&tsipclkb>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) ti,mux-tbl = <0x0>, <0x1>, <0x2>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) <0x3>, <0x4>, <0x8>, <0xC>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) assigned-clocks = <&cpts_refclk_mux>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) assigned-clock-parents = <&chipclk12>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) interfaces {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) gbe0: interface-0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) slave-port = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) link-interface = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) gbe1: interface-1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) slave-port = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) link-interface = <4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) secondary-slave-ports {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) port-2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) slave-port = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) link-interface = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) port-3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) slave-port = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) link-interface = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) netcp-interfaces {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) interface-0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) rx-channel = <22>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) rx-pool = <1024 12>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) tx-pool = <1024 12>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) rx-queue-depth = <128 128 0 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) rx-buffer-size = <1518 4096 0 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) rx-queue = <8704>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) tx-completion-queue = <8706>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) efuse-mac = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) netcp-gbe = <&gbe0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) interface-1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) rx-channel = <23>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) rx-pool = <1024 12>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) tx-pool = <1024 12>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) rx-queue-depth = <128 128 0 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) rx-buffer-size = <1518 4096 0 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) rx-queue = <8705>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) tx-completion-queue = <8707>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) efuse-mac = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) local-mac-address = [02 18 31 7e 3e 6f];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) netcp-gbe = <&gbe1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) CPTS board configuration - select external CPTS RFTCLK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) &tsrefclk{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) clock-frequency = <500000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) &cpts_refclk_mux {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) assigned-clock-parents = <&tsrefclk>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) };