Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * Faraday Technology FTGMAC100 gigabit ethernet controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - compatible: "faraday,ftgmac100"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)   Must also contain one of these if used as part of an Aspeed AST2400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)   or 2500 family SoC as they have some subtle tweaks to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)   implementation:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)      - "aspeed,ast2400-mac"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)      - "aspeed,ast2500-mac"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)      - "aspeed,ast2600-mac"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - reg: Address and length of the register set for the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - interrupts: Should contain ethernet controller interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - phy-mode: See ethernet.txt file in the same directory. If the property is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)   absent, "rgmii" is assumed. Supported values are "rgmii*" and "rmii" for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)   aspeed parts. Other (unknown) parts will accept any value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - use-ncsi: Use the NC-SI stack instead of an MDIO PHY. Currently assumes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)   rmii (100bT) but kept as a separate property in case NC-SI grows support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)   for a gigabit link.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - no-hw-checksum: Used to disable HW checksum support. Here for backward
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)   compatibility as the driver now should have correct defaults based on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)   the SoC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - clocks: In accordance with the generic clock bindings. Must describe the MAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)   IP clock, and optionally an RMII RCLK gate for the AST2500/AST2600. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)   required MAC clock must be the first cell.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) - clock-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)       - "MACCLK": The MAC IP clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)       - "RCLK": Clock gate for the RMII RCLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	mac0: ethernet@1e660000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		reg = <0x1e660000 0x180>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		interrupts = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		use-ncsi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	};