^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) * Freescale Fast Ethernet Controller (FEC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) - compatible : Should be "fsl,<soc>-fec"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - reg : Address and length of the register set for the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) - interrupts : Should contain fec interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - phy-mode : See ethernet.txt file in the same directory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - phy-supply : regulator that powers the Ethernet PHY.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - phy-handle : phandle to the PHY device connected to this device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - fixed-link : Assume a fixed link. See fixed-link.txt in the same directory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Use instead of phy-handle.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - fsl,num-tx-queues : The property is valid for enet-avb IP, which supports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) hw multi queues. Should specify the tx queue number, otherwise set tx queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) number to 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - fsl,num-rx-queues : The property is valid for enet-avb IP, which supports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) hw multi queues. Should specify the rx queue number, otherwise set rx queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) number to 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - fsl,magic-packet : If present, indicates that the hardware supports waking
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) up via magic packet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - fsl,err006687-workaround-present: If present indicates that the system has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) the hardware workaround for ERR006687 applied and does not need a software
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) workaround.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) - fsl,stop-mode: register bits of stop mode control, the format is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) <&gpr req_gpr req_bit>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) gpr is the phandle to general purpose register node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) req_gpr is the gpr register offset for ENET stop request.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) req_bit is the gpr bit offset for ENET stop request.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) -interrupt-names: names of the interrupts listed in interrupts property in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) the same order. The defaults if not specified are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) __Number of interrupts__ __Default__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 1 "int0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 2 "int0", "pps"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 3 "int0", "int1", "int2"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 4 "int0", "int1", "int2", "pps"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) The order may be changed as long as they correspond to the interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) property. Currently, only i.mx7 uses "int1" and "int2". They correspond to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) tx/rx queues 1 and 2. "int0" will be used for queue 0 and ENET_MII interrupts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) For imx6sx, "int0" handles all 3 queues and ENET_MII. "pps" is for the pulse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) per second interrupt associated with 1588 precision time protocol(PTP).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) Optional subnodes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) - mdio : specifies the mdio bus in the FEC, used as a container for phy nodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) according to phy.txt in the same directory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) Deprecated optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) To avoid these, create a phy node according to phy.txt in the same
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) directory, and point the fec's "phy-handle" property to it. Then use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) the phy's reset binding, again described by phy.txt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) - phy-reset-gpios : Should specify the gpio for phy reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) - phy-reset-duration : Reset duration in milliseconds. Should present
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) only if property "phy-reset-gpios" is available. Missing the property
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) will have the duration be 1 millisecond. Numbers greater than 1000 are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) invalid and 1 millisecond will be used instead.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) - phy-reset-active-high : If present then the reset sequence using the GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) specified in the "phy-reset-gpios" property is reversed (H=reset state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) L=operation state).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) - phy-reset-post-delay : Post reset delay in milliseconds. If present then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) a delay of phy-reset-post-delay milliseconds will be observed after the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) phy-reset-gpios has been toggled. Can be omitted thus no delay is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) observed. Delay is in range of 1ms to 1000ms. Other delays are invalid.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) ethernet@83fec000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) compatible = "fsl,imx51-fec", "fsl,imx27-fec";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) reg = <0x83fec000 0x4000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) interrupts = <87>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) phy-mode = "mii";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; /* GPIO2_14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) local-mac-address = [00 04 9F 01 1B B9];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) phy-supply = <®_fec_supply>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) Example with phy specified:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) ethernet@83fec000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) compatible = "fsl,imx51-fec", "fsl,imx27-fec";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) reg = <0x83fec000 0x4000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) interrupts = <87>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) phy-mode = "mii";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; /* GPIO2_14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) local-mac-address = [00 04 9F 01 1B B9];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) phy-supply = <®_fec_supply>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) phy-handle = <ðphy>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) mdio {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) clock-frequency = <5000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) ethphy: ethernet-phy@6 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) compatible = "ethernet-phy-ieee802.3-c22";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) reg = <6>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) max-speed = <100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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